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Commit 1ea06be6 authored by Hareesh Gundu's avatar Hareesh Gundu Committed by Gerrit - the friendly Code Review server
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ARM: dts: msm: Add GPU power levels support to atoll 



For atoll GPU max clock is 800Mhz and DDR max is 2.1Ghz.
Add required GPU power level support for same.

Change-Id: I5a67ea4d0c183c0b94b5ec796aacb49662380816
Signed-off-by: default avatarHareesh Gundu <hareeshg@codeaurora.org>
parent 73ad9c51

arch/arm64/boot/dts/qcom/atoll.dtsi

+105 −1
Original line number Diff line number Diff line
@@ -2981,6 +2981,110 @@ 


&msm_gpu {

	/delete-property/ qcom,gpu-speed-bin;

	/delete-property/ qcom,msm-bus,num-cases;

	/delete-property/ qcom,msm-bus,vectors-KBps;

	/delete-property/ qcom,initial-pwrlevel;

	/delete-property/ qcom,ca-target-pwrlevel;



	qcom,msm-bus,num-cases = <13>;

	qcom,msm-bus,vectors-KBps =

		<26 512 0 0>,

		<26 512 0 400000>,     /*  1 bus=100  */

		<26 512 0 800000>,     /*  2 bus=200  */

		<26 512 0 1200000>,    /*  3 bus=300  */

		<26 512 0 1804000>,    /*  4 bus=451  */

		<26 512 0 2188000>,    /*  5 bus=547  */

		<26 512 0 2724000>,    /*  6 bus=681  */

		<26 512 0 3300000>,    /*  7 bus=825  */

		<26 512 0 4068000>,    /*  8 bus=1017 */

		<26 512 0 5412000>,    /*  9 bus=1353 */

		<26 512 0 6220000>,    /* 10 bus=1555 */

		<26 512 0 7216000>,    /* 11 bus=1804 */

		<26 512 0 8532000>;    /* 12 bus=2133 */



	qcom,initial-pwrlevel = <6>;

	qcom,ca-target-pwrlevel = <4>;



	/delete-node/ qcom,gpu-pwrlevel-bins;



	qcom,gpu-pwrlevels {

		#address-cells = <1>;

		#size-cells = <0>;



		compatible = "qcom,gpu-pwrlevels";



		/* TURBO */

		qcom,gpu-pwrlevel@0 {

			reg = <0>;

			qcom,gpu-freq = <800000000>;

			qcom,bus-freq = <11>;

			qcom,bus-min = <10>;

			qcom,bus-max = <12>;

		};



		/* NOM_L1 */

		qcom,gpu-pwrlevel@1 {

			reg = <1>;

			qcom,gpu-freq = <650000000>;

			qcom,bus-freq = <10>;

			qcom,bus-min = <8>;

			qcom,bus-max = <11>;

		};



		/* NOM */

		qcom,gpu-pwrlevel@2 {

			reg = <2>;

			qcom,gpu-freq = <565000000>;

			qcom,bus-freq = <9>;

			qcom,bus-min = <8>;

			qcom,bus-max = <10>;

		};



		/* SVS_L1 */

		qcom,gpu-pwrlevel@3 {

			reg = <3>;

			qcom,gpu-freq = <430000000>;

			qcom,bus-freq = <8>;

			qcom,bus-min = <7>;

			qcom,bus-max = <10>;

		};



		/* SVS */

		qcom,gpu-pwrlevel@4 {

			reg = <4>;

			qcom,gpu-freq = <355000000>;

			qcom,bus-freq = <7>;

			qcom,bus-min = <5>;

			qcom,bus-max = <8>;

		};



		/* LOW SVS */

		qcom,gpu-pwrlevel@5 {

			reg = <5>;

			qcom,gpu-freq = <267000000>;

			qcom,bus-freq = <6>;

			qcom,bus-min = <4>;

			qcom,bus-max = <7>;

		};



		/* LOW SVS */

		qcom,gpu-pwrlevel@6 {

			reg = <6>;

			qcom,gpu-freq = <180000000>;

			qcom,bus-freq = <4>;

			qcom,bus-min = <3>;

			qcom,bus-max = <4>;

		};



		/* XO */

		qcom,gpu-pwrlevel@7 {

			reg = <7>;

			qcom,gpu-freq = <0>;

			qcom,bus-freq = <0>;

			qcom,bus-min = <0>;

			qcom,bus-max = <0>;

		};

	};

};



&ufs_phy_gdsc {