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Commit 1e3ac4a9 authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge changes I0f7c47ac,I2017e137,Ibcf39016 into msm-next 

* changes:
  scripts: Update the gcc-wrapper white list for 4.12.rc6 release
  Merge remote-tracking branch 'origin/tmp-41f1830f' into rc5
  arm64: xchg: Fix compilation issue with __xchg_mb
parents c165c228 6dbad46b

Documentation/admin-guide/kernel-parameters.txt

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@@ -866,6 +866,15 @@ 


	dscc4.setup=	[NET]



	dt_cpu_ftrs=	[PPC]

			Format: {"off" | "known"}

			Control how the dt_cpu_ftrs device-tree binding is

			used for CPU feature discovery and setup (if it

			exists).

			off: Do not use it, fall back to legacy cpu table.

			known: Do not pass through unknown features to guests

			or userspace, only those that the kernel is aware of.



	dump_apple_properties	[X86]

			Dump name and content of EFI device properties on

			x86 Macs.  Useful for driver authors to determine
@@ -3802,6 +3811,13 @@ 
			expediting.  Set to zero to disable automatic

			expediting.



	stack_guard_gap=	[MM]

			override the default stack gap protection. The value

			is in page units and it defines how many pages prior

			to (for stacks growing down) resp. after (for stacks

			growing up) the main stack are reserved for no other

			mapping. Default value is 256 pages.



	stacktrace	[FTRACE]

			Enabled the stack tracer on boot up.

Documentation/devicetree/bindings/net/dsa/marvell.txt

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@@ -26,6 +26,10 @@ Optional properties: 
- interrupt-controller	: Indicates the switch is itself an interrupt

			  controller. This is used for the PHY interrupts.

#interrupt-cells = <2>	: Controller uses two cells, number and flag

- eeprom-length		: Set to the length of an EEPROM connected to the

			  switch. Must be set if the switch can not detect

			  the presence and/or size of a connected EEPROM,

			  otherwise optional.

- mdio			: Container of PHY and devices on the switches MDIO

			  bus.

- mdio?		: Container of PHYs and devices on the external MDIO

Documentation/devicetree/bindings/usb/dwc2.txt

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@@ -10,6 +10,7 @@ Required properties: 
  - "rockchip,rk3288-usb", "rockchip,rk3066-usb", "snps,dwc2": for rk3288 Soc;

  - "lantiq,arx100-usb": The DWC2 USB controller instance in Lantiq ARX SoCs;

  - "lantiq,xrx200-usb": The DWC2 USB controller instance in Lantiq XRX SoCs;

  - "amlogic,meson8-usb": The DWC2 USB controller instance in Amlogic Meson8 SoCs;

  - "amlogic,meson8b-usb": The DWC2 USB controller instance in Amlogic Meson8b SoCs;

  - "amlogic,meson-gxbb-usb": The DWC2 USB controller instance in Amlogic S905 SoCs;

  - "amcc,dwc-otg": The DWC2 USB controller instance in AMCC Canyonlands 460EX SoCs;

Documentation/networking/dpaa.txt

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The QorIQ DPAA Ethernet Driver

==============================



Authors:

Madalin Bucur <madalin.bucur@nxp.com>

Camelia Groza <camelia.groza@nxp.com>



Contents

========



	- DPAA Ethernet Overview

	- DPAA Ethernet Supported SoCs

	- Configuring DPAA Ethernet in your kernel

	- DPAA Ethernet Frame Processing

	- DPAA Ethernet Features

	- Debugging



DPAA Ethernet Overview

======================



DPAA stands for Data Path Acceleration Architecture and it is a

set of networking acceleration IPs that are available on several

generations of SoCs, both on PowerPC and ARM64.



The Freescale DPAA architecture consists of a series of hardware blocks

that support Ethernet connectivity. The Ethernet driver depends upon the

following drivers in the Linux kernel:



 - Peripheral Access Memory Unit (PAMU) (* needed only for PPC platforms)

    drivers/iommu/fsl_*

 - Frame Manager (FMan)

    drivers/net/ethernet/freescale/fman

 - Queue Manager (QMan), Buffer Manager (BMan)

    drivers/soc/fsl/qbman



A simplified view of the dpaa_eth interfaces mapped to FMan MACs:



  dpaa_eth       /eth0\     ...       /ethN\

  driver        |      |             |      |

  -------------   ----   -----------   ----   -------------

       -Ports  / Tx  Rx \    ...    / Tx  Rx \

  FMan        |          |         |          |

       -MACs  |   MAC0   |         |   MACN   |

             /   dtsec0   \  ...  /   dtsecN   \ (or tgec)

            /              \     /              \(or memac)

  ---------  --------------  ---  --------------  ---------

      FMan, FMan Port, FMan SP, FMan MURAM drivers

  ---------------------------------------------------------

      FMan HW blocks: MURAM, MACs, Ports, SP

  ---------------------------------------------------------



The dpaa_eth relation to the QMan, BMan and FMan:

              ________________________________

  dpaa_eth   /            eth0                \

  driver    /                                  \

  ---------   -^-   -^-   -^-   ---    ---------

  QMan driver / \   / \   / \  \   /  | BMan    |

             |Rx | |Rx | |Tx | |Tx |  | driver  |

  ---------  |Dfl| |Err| |Cnf| |FQs|  |         |

  QMan HW    |FQ | |FQ | |FQs| |   |  |         |

             /   \ /   \ /   \  \ /   |         |

  ---------   ---   ---   ---   -v-    ---------

            |        FMan QMI         |         |

            | FMan HW       FMan BMI  | BMan HW |

              -----------------------   --------



where the acronyms used above (and in the code) are:

DPAA = Data Path Acceleration Architecture

FMan = DPAA Frame Manager

QMan = DPAA Queue Manager

BMan = DPAA Buffers Manager

QMI = QMan interface in FMan

BMI = BMan interface in FMan

FMan SP = FMan Storage Profiles

MURAM = Multi-user RAM in FMan

FQ = QMan Frame Queue

Rx Dfl FQ = default reception FQ

Rx Err FQ = Rx error frames FQ

Tx Cnf FQ = Tx confirmation FQs

Tx FQs = transmission frame queues

dtsec = datapath three speed Ethernet controller (10/100/1000 Mbps)

tgec = ten gigabit Ethernet controller (10 Gbps)

memac = multirate Ethernet MAC (10/100/1000/10000)



DPAA Ethernet Supported SoCs

============================



The DPAA drivers enable the Ethernet controllers present on the following SoCs:



# PPC

P1023

P2041

P3041

P4080

P5020

P5040

T1023

T1024

T1040

T1042

T2080

T4240

B4860



# ARM

LS1043A

LS1046A



Configuring DPAA Ethernet in your kernel

========================================



To enable the DPAA Ethernet driver, the following Kconfig options are required:



# common for arch/arm64 and arch/powerpc platforms

CONFIG_FSL_DPAA=y

CONFIG_FSL_FMAN=y

CONFIG_FSL_DPAA_ETH=y

CONFIG_FSL_XGMAC_MDIO=y



# for arch/powerpc only

CONFIG_FSL_PAMU=y



# common options needed for the PHYs used on the RDBs

CONFIG_VITESSE_PHY=y

CONFIG_REALTEK_PHY=y

CONFIG_AQUANTIA_PHY=y



DPAA Ethernet Frame Processing

==============================



On Rx, buffers for the incoming frames are retrieved from one of the three

existing buffers pools. The driver initializes and seeds these, each with

buffers of different sizes: 1KB, 2KB and 4KB.



On Tx, all transmitted frames are returned to the driver through Tx

confirmation frame queues. The driver is then responsible for freeing the

buffers. In order to do this properly, a backpointer is added to the buffer

before transmission that points to the skb. When the buffer returns to the

driver on a confirmation FQ, the skb can be correctly consumed.



DPAA Ethernet Features

======================



Currently the DPAA Ethernet driver enables the basic features required for

a Linux Ethernet driver. The support for advanced features will be added

gradually.



The driver has Rx and Tx checksum offloading for UDP and TCP. Currently the Rx

checksum offload feature is enabled by default and cannot be controlled through

ethtool.



The driver has support for multiple prioritized Tx traffic classes. Priorities

range from 0 (lowest) to 3 (highest). These are mapped to HW workqueues with

strict priority levels. Each traffic class contains NR_CPU TX queues. By

default, only one traffic class is enabled and the lowest priority Tx queues

are used. Higher priority traffic classes can be enabled with the mqprio

qdisc. For example, all four traffic classes are enabled on an interface with

the following command. Furthermore, skb priority levels are mapped to traffic

classes as follows:



	* priorities 0 to 3 - traffic class 0 (low priority)

	* priorities 4 to 7 - traffic class 1 (medium-low priority)

	* priorities 8 to 11 - traffic class 2 (medium-high priority)

	* priorities 12 to 15 - traffic class 3 (high priority)



tc qdisc add dev <int> root handle 1: \

	 mqprio num_tc 4 map 0 0 0 0 1 1 1 1 2 2 2 2 3 3 3 3 hw 1



Debugging

=========



The following statistics are exported for each interface through ethtool:



	- interrupt count per CPU

	- Rx packets count per CPU

	- Tx packets count per CPU

	- Tx confirmed packets count per CPU

	- Tx S/G frames count per CPU

	- Tx error count per CPU

	- Rx error count per CPU

	- Rx error count per type

	- congestion related statistics:

		- congestion status

		- time spent in congestion

		- number of time the device entered congestion

		- dropped packets count per cause



The driver also exports the following information in sysfs:



	- the FQ IDs for each FQ type

	/sys/devices/platform/dpaa-ethernet.0/net/<int>/fqids



	- the IDs of the buffer pools in use

	/sys/devices/platform/dpaa-ethernet.0/net/<int>/bpids

Documentation/networking/scaling.txt

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@@ -122,7 +122,7 @@ associated flow of the packet. The hash is either provided by hardware 
or will be computed in the stack. Capable hardware can pass the hash in

the receive descriptor for the packet; this would usually be the same

hash used for RSS (e.g. computed Toeplitz hash). The hash is saved in

skb->rx_hash and can be used elsewhere in the stack as a hash of the

skb->hash and can be used elsewhere in the stack as a hash of the

packet’s flow.



Each receive hardware queue has an associated list of CPUs to which