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Commit 1e1f4091 authored by Rishi Gupta's avatar Rishi Gupta
Browse files

ARM: dts: sa2150p: enable rgmii level shifter on nand vt som 



The NAND based sa2150p SOM has a level shifter which is
enabled through GPIO 16. This commit configures GPIO 16
to low state by-default to enable the shifter.

Change-Id: I770e6b49e9dca2e9d7f6076ef772a279a4c2a25e
Signed-off-by: default avatarRishi Gupta <rishgupt@codeaurora.org>
parent 4abe03d7

arch/arm64/boot/dts/qcom/sa2145p-ccard-nand-dc.dts

+30 −0
Original line number Diff line number Diff line
@@ -81,3 +81,33 @@ 
		rx-dll-bypass;

	};

};



&tlmm {

	/delete-node/ mdss_hdmi_ddc_active;

	/delete-node/ mdss_hdmi_ddc_suspend;

	rgmii_level_shifter: rgmii_level_shifter {

		mux {

			pins = "gpio16";

			function = "gpio";

		};

		config {

			pins = "gpio16";

			drive-strength = <2>;

			bias-pull-down;

			output-low;

		};

	};

};



&ethqos_hw {

	pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",

		"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",

		"dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state",

		"dev-emac-rgmii_txc_state",  "dev-emac-rgmii_tx_ctl_state",

		"dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state",

		"dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state",

		"dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state",

		"dev-emac-phy_intr", "dev-emac-phy_reset_state",

		"dev-emac-rgmii_lvl_shift_state";

	pinctrl-16 = <&rgmii_level_shifter>;

};

arch/arm64/boot/dts/qcom/sa2150p-ccard-nand-dc.dts

+30 −0
Original line number Diff line number Diff line
@@ -155,3 +155,33 @@ 
		rx-dll-bypass;

	};

};



&tlmm {

	/delete-node/ mdss_hdmi_ddc_active;

	/delete-node/ mdss_hdmi_ddc_suspend;

	rgmii_level_shifter: rgmii_level_shifter {

		mux {

			pins = "gpio16";

			function = "gpio";

		};

		config {

			pins = "gpio16";

			drive-strength = <2>;

			bias-pull-down;

			output-low;

		};

	};

};



&ethqos_hw {

	pinctrl-names = "dev-emac-mdc", "dev-emac-mdio",

		"dev-emac-rgmii_txd0_state", "dev-emac-rgmii_txd1_state",

		"dev-emac-rgmii_txd2_state", "dev-emac-rgmii_txd3_state",

		"dev-emac-rgmii_txc_state",  "dev-emac-rgmii_tx_ctl_state",

		"dev-emac-rgmii_rxd0_state", "dev-emac-rgmii_rxd1_state",

		"dev-emac-rgmii_rxd2_state", "dev-emac-rgmii_rxd3_state",

		"dev-emac-rgmii_rxc_state", "dev-emac-rgmii_rx_ctl_state",

		"dev-emac-phy_intr", "dev-emac-phy_reset_state",

		"dev-emac-rgmii_lvl_shift_state";

	pinctrl-16 = <&rgmii_level_shifter>;

};