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Commit 1cebe44b authored by qctecmdr's avatar qctecmdr Committed by Gerrit - the friendly Code Review server
Browse files

Merge "ARM: dts: qcom: update display dts nodes for sdm429w WTP"

parents 1e453d39 0ae816bc

arch/arm64/boot/dts/qcom/sdm429-bg-dvt2-wtp-overlay.dts

+53 −1
Original line number Diff line number Diff line
@@ -16,6 +16,7 @@ 


#include <dt-bindings/clock/qcom,rpmcc.h>

#include "sdm429-bg-dvt2-wtp.dtsi"

#include "sdm429-mdss-panels.dtsi"



/ {

	model = "Qualcomm Technologies, Inc. SDM429 QRD BG WTP Overlay";
@@ -26,6 +27,58 @@ 


};



&mdss_mdp {

	qcom,mdss-pref-prim-intf = "dsi";

};



&mdss_dsi {

	/delete-property/ vdda-supply;

	/delete-property/ vddio-supply;

	vdda-supply = <&L6A>; /* 0.8v */

	vddio-supply = <&L13A>; /* 1.8v */



	qcom,ctrl-supply-entries {

		#address-cells = <1>;

		#size-cells = <0>;



		qcom,ctrl-supply-entry@0 {

			reg = <0>;

			qcom,supply-name = "vdda";

			qcom,supply-min-voltage = <800000>;

			qcom,supply-max-voltage = <800000>;

			qcom,supply-enable-load = <100000>;

			qcom,supply-disable-load = <100>;

			qcom,supply-post-on-sleep = <20>;

		};

	};

};



&mdss_dsi0 {

	qcom,dsi-pref-prim-pan = <&dsi_auo_416p_amoled_cmd>;

	/delete-property/ vdd-supply;

	pinctrl-names = "mdss_default", "mdss_sleep";

	pinctrl-0 = <&mdss_te_active>;

	pinctrl-1 = <&mdss_te_suspend>;

	vddio-supply = <&L11A>;

	qcom,platform-te-gpio = <&tlmm 24 0>;

	qcom,platform-reset-gpio = <&tlmm 60 0>;

	qcom,platform-enable-gpio = <&pm660_gpios 12 0>;



};



&mdss_dsi0_pll {

	/delete-property/ vddio-supply;

	vddio-supply = <&L13A>;

};



&mdss_dsi1 {

	status = "disabled";

};



&mdss_dsi1_pll {

	status = "disabled";

};



&i2c_4 {

	status = "ok";
@@ -52,4 +105,3 @@ 
		raydium,fw_id = <0x2202>;

	};

};

arch/arm64/boot/dts/qcom/sdm429-mdss.dtsi

+5 −6
Original line number Diff line number Diff line
@@ -185,12 +185,11 @@ 
				<22 512 0 1000>;

		};



		/*TODO*/

		smmu_mdp_unsec: qcom,smmu_mdp_unsec_cb {

			compatible = "qcom,smmu_mdp_unsec";

			iommus = <&apps_iommu 0x2800 0>; /* For NS ctx bank */

		};

		/*TODO*/



		smmu_mdp_sec: qcom,smmu_mdp_sec_cb {

			compatible = "qcom,smmu_mdp_sec";

			iommus = <&apps_iommu 0x2801 0>; /* For SEC Ctx Bank */
@@ -243,10 +242,10 @@ 
		clocks = <&gcc_mdss MDSS_MDP_VOTE_CLK>,

			<&gcc GCC_MDSS_AHB_CLK>,

			<&gcc GCC_MDSS_AXI_CLK>,

			<&gcc_mdss BYTE0_CLK_SRC>, /*TODO*/

			<&gcc_mdss BYTE1_CLK_SRC>, /*TODO*/

			<&gcc_mdss PCLK0_CLK_SRC>, /*TODO*/

			<&gcc_mdss PCLK1_CLK_SRC>; /*TODO*/

			<&mdss_dsi0_pll BYTE_CLK_SRC_0_CLK>,

			<&mdss_dsi1_pll BYTE_CLK_SRC_1_CLK>,

			<&mdss_dsi0_pll PCLK_SRC_MUX_0_CLK>,

			<&mdss_dsi1_pll PCLK_SRC_MUX_1_CLK>;

		clock-names = "mdp_core_clk", "iface_clk", "bus_clk",

			"ext_byte0_clk", "ext_byte1_clk", "ext_pixel0_clk",

			"ext_pixel1_clk";

arch/arm64/boot/dts/qcom/sdm429-wtp-overlay.dts

+34 −0
Original line number Diff line number Diff line
@@ -30,6 +30,28 @@ 
	qcom,mdss-pref-prim-intf = "dsi";

};



&mdss_dsi {

	/delete-property/ vdda-supply;

	/delete-property/ vddio-supply;

	vdda-supply = <&L6A>; /* 0.8v */

	vddio-supply = <&L13A>; /* 1.8v */



	qcom,ctrl-supply-entries {

		#address-cells = <1>;

		#size-cells = <0>;



		qcom,ctrl-supply-entry@0 {

			reg = <0>;

			qcom,supply-name = "vdda";

			qcom,supply-min-voltage = <800000>;

			qcom,supply-max-voltage = <800000>;

			qcom,supply-enable-load = <100000>;

			qcom,supply-disable-load = <100>;

			qcom,supply-post-on-sleep = <20>;

		};

	};

};



&mdss_dsi0 {

	qcom,dsi-pref-prim-pan = <&dsi_auo_416p_amoled_cmd>;

	/delete-property/ vdd-supply;
@@ -37,13 +59,25 @@ 
	pinctrl-0 = <&mdss_te_active>;

	pinctrl-1 = <&mdss_te_suspend>;

	vddio-supply = <&L11A>;

	qcom,platform-te-gpio = <&tlmm 24 0>;

	qcom,platform-reset-gpio = <&tlmm 60 0>;

	qcom,platform-enable-gpio = <&pm660_gpios 12 0>;



};



&mdss_dsi0_pll {

	/delete-property/ vddio-supply;

	vddio-supply = <&L13A>;

};



&mdss_dsi1 {

	status = "disabled";

};



&mdss_dsi1_pll {

	status = "disabled";

};



&i2c_4 {

	status = "ok";