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Commit 1be81ea5 authored by Joshua Clayton's avatar Joshua Clayton Committed by Shawn Guo
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ARM: dts: imx6: Add imx-weim parameters to dtsi's



imx-weim should always set address-cells to 2,
and size_cells to 1.
On imx6, fsl,weim-cs-gpr will always be &gpr

Set these common parameters in the dtsi file,
rather than in a downstream dts.

Signed-off-by: default avatarJoshua Clayton <stillcompiling@gmail.com>
Reviewed-by: default avatarFabio Estevam <fabio.estevam@nxp.com>
Signed-off-by: default avatarShawn Guo <shawnguo@kernel.org>
parent 46311707
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+0 −3
Original line number Diff line number Diff line
@@ -232,10 +232,7 @@
};

&weim {
	#address-cells = <2>;
	#size-cells = <1>;
	ranges = <0 0 0x08000000 0x08000000>;
	fsl,weim-cs-gpr = <&gpr>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_weimfpga &pinctrl_weimcs>;
	status = "okay";
+0 −2
Original line number Diff line number Diff line
@@ -613,8 +613,6 @@
&weim {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_weim_nor &pinctrl_weim_cs0>;
	#address-cells = <2>;
	#size-cells = <1>;
	ranges = <0 0 0x08000000 0x08000000>;
	status = "disabled"; /* pin conflict with SPI NOR */

+3 −0
Original line number Diff line number Diff line
@@ -1092,10 +1092,13 @@
			};

			weim: weim@021b8000 {
				#address-cells = <2>;
				#size-cells = <1>;
				compatible = "fsl,imx6q-weim";
				reg = <0x021b8000 0x4000>;
				interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks IMX6QDL_CLK_EIM_SLOW>;
				fsl,weim-cs-gpr = <&gpr>;
			};

			ocotp: ocotp@021bc000 {
+3 −0
Original line number Diff line number Diff line
@@ -893,8 +893,11 @@
			};

			weim: weim@021b8000 {
				#address-cells = <2>;
				#size-cells = <1>;
				reg = <0x021b8000 0x4000>;
				interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
				fsl,weim-cs-gpr = <&gpr>;
			};

			ocotp: ocotp@021bc000 {
+3 −0
Original line number Diff line number Diff line
@@ -968,10 +968,13 @@
			};

			weim: weim@021b8000 {
				#address-cells = <2>;
				#size-cells = <1>;
				compatible = "fsl,imx6sx-weim", "fsl,imx6q-weim";
				reg = <0x021b8000 0x4000>;
				interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
				clocks = <&clks IMX6SX_CLK_EIM_SLOW>;
				fsl,weim-cs-gpr = <&gpr>;
			};

			ocotp: ocotp@021bc000 {