Loading drivers/gpu/drm/radeon/radeon.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -241,6 +241,7 @@ extern int rv6xx_get_temp(struct radeon_device *rdev); extern int rv770_get_temp(struct radeon_device *rdev); extern int rv770_get_temp(struct radeon_device *rdev); extern int evergreen_get_temp(struct radeon_device *rdev); extern int evergreen_get_temp(struct radeon_device *rdev); extern int sumo_get_temp(struct radeon_device *rdev); extern int sumo_get_temp(struct radeon_device *rdev); extern int si_get_temp(struct radeon_device *rdev); extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, unsigned *bankh, unsigned *mtaspect, unsigned *bankh, unsigned *mtaspect, unsigned *tile_split); unsigned *tile_split); Loading drivers/gpu/drm/radeon/radeon_pm.c +4 −0 Original line number Original line Diff line number Diff line Loading @@ -474,6 +474,9 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, case THERMAL_TYPE_SUMO: case THERMAL_TYPE_SUMO: temp = sumo_get_temp(rdev); temp = sumo_get_temp(rdev); break; break; case THERMAL_TYPE_SI: temp = si_get_temp(rdev); break; default: default: temp = 0; temp = 0; break; break; Loading Loading @@ -514,6 +517,7 @@ static int radeon_hwmon_init(struct radeon_device *rdev) case THERMAL_TYPE_EVERGREEN: case THERMAL_TYPE_EVERGREEN: case THERMAL_TYPE_NI: case THERMAL_TYPE_NI: case THERMAL_TYPE_SUMO: case THERMAL_TYPE_SUMO: case THERMAL_TYPE_SI: rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); if (IS_ERR(rdev->pm.int_hwmon_dev)) { if (IS_ERR(rdev->pm.int_hwmon_dev)) { err = PTR_ERR(rdev->pm.int_hwmon_dev); err = PTR_ERR(rdev->pm.int_hwmon_dev); Loading drivers/gpu/drm/radeon/si.c +19 −0 Original line number Original line Diff line number Diff line Loading @@ -28,6 +28,25 @@ #include "sid.h" #include "sid.h" #include "atom.h" #include "atom.h" /* get temperature in millidegrees */ int si_get_temp(struct radeon_device *rdev) { u32 temp; int actual_temp = 0; temp = (RREG32(CG_MULT_THERMAL_STATUS) & CTF_TEMP_MASK) >> CTF_TEMP_SHIFT; if (temp & 0x200) actual_temp = 255; else actual_temp = temp & 0x1ff; actual_temp = (actual_temp * 1000); return actual_temp; } /* watermark setup */ /* watermark setup */ static u32 dce6_line_buffer_adjust(struct radeon_device *rdev, static u32 dce6_line_buffer_adjust(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc, struct radeon_crtc *radeon_crtc, Loading drivers/gpu/drm/radeon/sid.h +8 −0 Original line number Original line Diff line number Diff line Loading @@ -24,6 +24,14 @@ #ifndef SI_H #ifndef SI_H #define SI_H #define SI_H #define CG_MULT_THERMAL_STATUS 0x714 #define ASIC_MAX_TEMP(x) ((x) << 0) #define ASIC_MAX_TEMP_MASK 0x000001ff #define ASIC_MAX_TEMP_SHIFT 0 #define CTF_TEMP(x) ((x) << 9) #define CTF_TEMP_MASK 0x0003fe00 #define CTF_TEMP_SHIFT 9 #define MC_SHARED_CHMAP 0x2004 #define MC_SHARED_CHMAP 0x2004 #define NOOFCHAN_SHIFT 12 #define NOOFCHAN_SHIFT 12 #define NOOFCHAN_MASK 0x0000f000 #define NOOFCHAN_MASK 0x0000f000 Loading Loading
drivers/gpu/drm/radeon/radeon.h +1 −0 Original line number Original line Diff line number Diff line Loading @@ -241,6 +241,7 @@ extern int rv6xx_get_temp(struct radeon_device *rdev); extern int rv770_get_temp(struct radeon_device *rdev); extern int rv770_get_temp(struct radeon_device *rdev); extern int evergreen_get_temp(struct radeon_device *rdev); extern int evergreen_get_temp(struct radeon_device *rdev); extern int sumo_get_temp(struct radeon_device *rdev); extern int sumo_get_temp(struct radeon_device *rdev); extern int si_get_temp(struct radeon_device *rdev); extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, extern void evergreen_tiling_fields(unsigned tiling_flags, unsigned *bankw, unsigned *bankh, unsigned *mtaspect, unsigned *bankh, unsigned *mtaspect, unsigned *tile_split); unsigned *tile_split); Loading
drivers/gpu/drm/radeon/radeon_pm.c +4 −0 Original line number Original line Diff line number Diff line Loading @@ -474,6 +474,9 @@ static ssize_t radeon_hwmon_show_temp(struct device *dev, case THERMAL_TYPE_SUMO: case THERMAL_TYPE_SUMO: temp = sumo_get_temp(rdev); temp = sumo_get_temp(rdev); break; break; case THERMAL_TYPE_SI: temp = si_get_temp(rdev); break; default: default: temp = 0; temp = 0; break; break; Loading Loading @@ -514,6 +517,7 @@ static int radeon_hwmon_init(struct radeon_device *rdev) case THERMAL_TYPE_EVERGREEN: case THERMAL_TYPE_EVERGREEN: case THERMAL_TYPE_NI: case THERMAL_TYPE_NI: case THERMAL_TYPE_SUMO: case THERMAL_TYPE_SUMO: case THERMAL_TYPE_SI: rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); rdev->pm.int_hwmon_dev = hwmon_device_register(rdev->dev); if (IS_ERR(rdev->pm.int_hwmon_dev)) { if (IS_ERR(rdev->pm.int_hwmon_dev)) { err = PTR_ERR(rdev->pm.int_hwmon_dev); err = PTR_ERR(rdev->pm.int_hwmon_dev); Loading
drivers/gpu/drm/radeon/si.c +19 −0 Original line number Original line Diff line number Diff line Loading @@ -28,6 +28,25 @@ #include "sid.h" #include "sid.h" #include "atom.h" #include "atom.h" /* get temperature in millidegrees */ int si_get_temp(struct radeon_device *rdev) { u32 temp; int actual_temp = 0; temp = (RREG32(CG_MULT_THERMAL_STATUS) & CTF_TEMP_MASK) >> CTF_TEMP_SHIFT; if (temp & 0x200) actual_temp = 255; else actual_temp = temp & 0x1ff; actual_temp = (actual_temp * 1000); return actual_temp; } /* watermark setup */ /* watermark setup */ static u32 dce6_line_buffer_adjust(struct radeon_device *rdev, static u32 dce6_line_buffer_adjust(struct radeon_device *rdev, struct radeon_crtc *radeon_crtc, struct radeon_crtc *radeon_crtc, Loading
drivers/gpu/drm/radeon/sid.h +8 −0 Original line number Original line Diff line number Diff line Loading @@ -24,6 +24,14 @@ #ifndef SI_H #ifndef SI_H #define SI_H #define SI_H #define CG_MULT_THERMAL_STATUS 0x714 #define ASIC_MAX_TEMP(x) ((x) << 0) #define ASIC_MAX_TEMP_MASK 0x000001ff #define ASIC_MAX_TEMP_SHIFT 0 #define CTF_TEMP(x) ((x) << 9) #define CTF_TEMP_MASK 0x0003fe00 #define CTF_TEMP_SHIFT 9 #define MC_SHARED_CHMAP 0x2004 #define MC_SHARED_CHMAP 0x2004 #define NOOFCHAN_SHIFT 12 #define NOOFCHAN_SHIFT 12 #define NOOFCHAN_MASK 0x0000f000 #define NOOFCHAN_MASK 0x0000f000 Loading