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Commit 1b95ce8f authored by Alex Williamson's avatar Alex Williamson Committed by Bjorn Helgaas
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PCI: Remove aer_do_secondary_bus_reset() 



One PCI bus reset function to rule them all.

Signed-off-by: default avatarAlex Williamson <alex.williamson@redhat.com>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
parent de0c548c

drivers/pci/pcie/aer/aerdrv.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -352,7 +352,7 @@ static pci_ers_result_t aer_root_reset(struct pci_dev *dev) 
	reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;

	reg32 &= ~ROOT_PORT_INTR_ON_MESG_MASK;

	pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);

	pci_write_config_dword(dev, pos + PCI_ERR_ROOT_COMMAND, reg32);





	aer_do_secondary_bus_reset(dev);

	pci_reset_bridge_secondary_bus(dev);

	dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n");

	dev_printk(KERN_DEBUG, &dev->dev, "Root Port link has been reset\n");





	/* Clear Root Error Status */

	/* Clear Root Error Status */

drivers/pci/pcie/aer/aerdrv.h

+0 −1
Original line number Original line Diff line number Diff line
@@ -106,7 +106,6 @@ static inline pci_ers_result_t merge_result(enum pci_ers_result orig, 
}

}





extern struct bus_type pcie_port_bus_type;

extern struct bus_type pcie_port_bus_type;

void aer_do_secondary_bus_reset(struct pci_dev *dev);

int aer_init(struct pcie_device *dev);

int aer_init(struct pcie_device *dev);

void aer_isr(struct work_struct *work);

void aer_isr(struct work_struct *work);

void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);

void aer_print_error(struct pci_dev *dev, struct aer_err_info *info);

drivers/pci/pcie/aer/aerdrv_core.c

+1 −34
Original line number Original line Diff line number Diff line
@@ -366,39 +366,6 @@ static pci_ers_result_t broadcast_error_message(struct pci_dev *dev, 
	return result_data.result;

	return result_data.result;

}

}





/**

 * aer_do_secondary_bus_reset - perform secondary bus reset

 * @dev: pointer to bridge's pci_dev data structure

 *

 * Invoked when performing link reset at Root Port or Downstream Port.

 */

void aer_do_secondary_bus_reset(struct pci_dev *dev)

{

	u16 p2p_ctrl;



	/* Assert Secondary Bus Reset */

	pci_read_config_word(dev, PCI_BRIDGE_CONTROL, &p2p_ctrl);

	p2p_ctrl |= PCI_BRIDGE_CTL_BUS_RESET;

	pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);



	/*

	 * we should send hot reset message for 2ms to allow it time to

	 * propagate to all downstream ports

	 */

	msleep(2);



	/* De-assert Secondary Bus Reset */

	p2p_ctrl &= ~PCI_BRIDGE_CTL_BUS_RESET;

	pci_write_config_word(dev, PCI_BRIDGE_CONTROL, p2p_ctrl);



	/*

	 * System software must wait for at least 100ms from the end

	 * of a reset of one or more device before it is permitted

	 * to issue Configuration Requests to those devices.

	 */

	msleep(200);

}



/**

/**

 * default_reset_link - default reset function

 * default_reset_link - default reset function

 * @dev: pointer to pci_dev data structure

 * @dev: pointer to pci_dev data structure
@@ -408,7 +375,7 @@ void aer_do_secondary_bus_reset(struct pci_dev *dev) 
 */

 */

static pci_ers_result_t default_reset_link(struct pci_dev *dev)

static pci_ers_result_t default_reset_link(struct pci_dev *dev)

{

{

	aer_do_secondary_bus_reset(dev);

	pci_reset_bridge_secondary_bus(dev);

	dev_printk(KERN_DEBUG, &dev->dev, "downstream link has been reset\n");

	dev_printk(KERN_DEBUG, &dev->dev, "downstream link has been reset\n");

	return PCI_ERS_RESULT_RECOVERED;

	return PCI_ERS_RESULT_RECOVERED;

}

}