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Commit 1a7adc2e authored by Leo Yan's avatar Leo Yan Committed by Greg Kroah-Hartman
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clk: hi3660: Mark clk_gate_ufs_subsys as critical 



commit 9f77a60669d13ed4ddfa6cd7374c9d88da378ffa upstream.

clk_gate_ufs_subsys is a system bus clock, turning off it will
introduce lockup issue during system suspend flow.  Let's mark
clk_gate_ufs_subsys as critical clock, thus keeps it on during
system suspend and resume.

Fixes: d374e6fd ("clk: hisilicon: Add clock driver for hi3660 SoC")
Cc: stable@vger.kernel.org
Cc: Zhong Kaihua <zhongkaihua@huawei.com>
Cc: John Stultz <john.stultz@linaro.org>
Cc: Zhangfei Gao <zhangfei.gao@linaro.org>
Suggested-by: default avatarDong Zhang <zhangdong46@hisilicon.com>
Signed-off-by: default avatarLeo Yan <leo.yan@linaro.org>
Signed-off-by: default avatarStephen Boyd <sboyd@kernel.org>
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent 04f34b76

drivers/clk/hisilicon/clk-hi3660.c

+5 −1
Original line number Diff line number Diff line
@@ -163,8 +163,12 @@ static const struct hisi_gate_clock hi3660_crgctrl_gate_sep_clks[] = { 
	  "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 17, 0, },

	{ HI3660_CLK_GATE_ISP_SNCLK2, "clk_gate_isp_snclk2",

	  "clk_isp_snclk_mux", CLK_SET_RATE_PARENT, 0x50, 18, 0, },

	/*

	 * clk_gate_ufs_subsys is a system bus clock, mark it as critical

	 * clock and keep it on for system suspend and resume.

	 */

	{ HI3660_CLK_GATE_UFS_SUBSYS, "clk_gate_ufs_subsys", "clk_div_sysbus",

	  CLK_SET_RATE_PARENT, 0x50, 21, 0, },

	  CLK_SET_RATE_PARENT | CLK_IS_CRITICAL, 0x50, 21, 0, },

	{ HI3660_PCLK_GATE_DSI0, "pclk_gate_dsi0", "clk_div_cfgbus",

	  CLK_SET_RATE_PARENT, 0x50, 28, 0, },

	{ HI3660_PCLK_GATE_DSI1, "pclk_gate_dsi1", "clk_div_cfgbus",