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Commit 19cf3edb authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'fixes' of git://git.linaro.org/people/rmk/linux-arm 

Pull ARM fixes from Russell King:
 "Mainly a group of fixes, the only exception is the wiring up of the
  kcmp syscall now that those patches went in during the last merge
  window."

* 'fixes' of git://git.linaro.org/people/rmk/linux-arm:
  ARM: 7668/1: fix memset-related crashes caused by recent GCC (4.7.2) optimizations
  ARM: 7667/1: perf: Fix section mismatch on armpmu_init()
  ARM: 7666/1: decompressor: add -mno-single-pic-base for building the decompressor
  ARM: 7665/1: Wire up kcmp syscall
  ARM: 7664/1: perf: remove erroneous semicolon from event initialisation
  ARM: 7663/1: perf: fix ARMv7 EVTYPE_MASK to include NSH bit
  ARM: 7662/1: hw_breakpoint: reset debug logic on secondary CPUs in s2ram resume
  ARM: 7661/1: mm: perform explicit branch predictor maintenance when required
  ARM: 7660/1: tlb: add branch predictor maintenance operations
  ARM: 7659/1: mm: make mm->context.id an atomic64_t variable
  ARM: 7658/1: mm: fix race updating mm->context.id on ASID rollover
  ARM: 7657/1: head: fix swapper and idmap population with LPAE and big-endian
  ARM: 7655/1: smp_twd: make twd_local_timer_of_register() no-op for nosmp
  ARM: 7652/1: mm: fix missing use of 'asid' to get asid value from mm->context.id
  ARM: 7642/1: netx: bump IRQ offset to 64
parents d3452436 455bd4c4

arch/arm/boot/compressed/Makefile

+1 −1
Original line number Diff line number Diff line
@@ -120,7 +120,7 @@ ORIG_CFLAGS := $(KBUILD_CFLAGS) 
KBUILD_CFLAGS = $(subst -pg, , $(ORIG_CFLAGS))

endif



ccflags-y := -fpic -fno-builtin -I$(obj)

ccflags-y := -fpic -mno-single-pic-base -fno-builtin -I$(obj)

asflags-y := -Wa,-march=all -DZIMAGE



# Supply kernel BSS size to the decompressor via a linker symbol.

arch/arm/include/asm/mmu.h

+4 −4
Original line number Diff line number Diff line
@@ -5,7 +5,7 @@ 


typedef struct {

#ifdef CONFIG_CPU_HAS_ASID

	u64 id;

	atomic64_t	id;

#endif

	unsigned int	vmalloc_seq;

} mm_context_t;
@@ -13,7 +13,7 @@ typedef struct { 
#ifdef CONFIG_CPU_HAS_ASID

#define ASID_BITS	8

#define ASID_MASK	((~0ULL) << ASID_BITS)

#define ASID(mm)	((mm)->context.id & ~ASID_MASK)

#define ASID(mm)	((mm)->context.id.counter & ~ASID_MASK)

#else

#define ASID(mm)	(0)

#endif

arch/arm/include/asm/mmu_context.h

+1 −1
Original line number Diff line number Diff line
@@ -25,7 +25,7 @@ void __check_vmalloc_seq(struct mm_struct *mm); 
#ifdef CONFIG_CPU_HAS_ASID



void check_and_switch_context(struct mm_struct *mm, struct task_struct *tsk);

#define init_new_context(tsk,mm)	({ mm->context.id = 0; })

#define init_new_context(tsk,mm)	({ atomic64_set(&mm->context.id, 0); 0; })



#else	/* !CONFIG_CPU_HAS_ASID */

arch/arm/include/asm/tlbflush.h

+28 −6
Original line number Diff line number Diff line
@@ -34,10 +34,13 @@ 
#define TLB_V6_D_ASID	(1 << 17)

#define TLB_V6_I_ASID	(1 << 18)



#define TLB_V6_BP	(1 << 19)



/* Unified Inner Shareable TLB operations (ARMv7 MP extensions) */

#define TLB_V7_UIS_PAGE	(1 << 19)

#define TLB_V7_UIS_FULL (1 << 20)

#define TLB_V7_UIS_ASID (1 << 21)

#define TLB_V7_UIS_PAGE	(1 << 20)

#define TLB_V7_UIS_FULL (1 << 21)

#define TLB_V7_UIS_ASID (1 << 22)

#define TLB_V7_UIS_BP	(1 << 23)



#define TLB_BARRIER	(1 << 28)

#define TLB_L2CLEAN_FR	(1 << 29)		/* Feroceon */
@@ -150,7 +153,8 @@ 
#define v6wbi_tlb_flags (TLB_WB | TLB_DCLEAN | TLB_BARRIER | \

			 TLB_V6_I_FULL | TLB_V6_D_FULL | \

			 TLB_V6_I_PAGE | TLB_V6_D_PAGE | \

			 TLB_V6_I_ASID | TLB_V6_D_ASID)

			 TLB_V6_I_ASID | TLB_V6_D_ASID | \

			 TLB_V6_BP)



#ifdef CONFIG_CPU_TLB_V6

# define v6wbi_possible_flags	v6wbi_tlb_flags
@@ -166,9 +170,11 @@ 
#endif



#define v7wbi_tlb_flags_smp	(TLB_WB | TLB_DCLEAN | TLB_BARRIER | \

			 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | TLB_V7_UIS_ASID)

				 TLB_V7_UIS_FULL | TLB_V7_UIS_PAGE | \

				 TLB_V7_UIS_ASID | TLB_V7_UIS_BP)

#define v7wbi_tlb_flags_up	(TLB_WB | TLB_DCLEAN | TLB_BARRIER | \

			 TLB_V6_U_FULL | TLB_V6_U_PAGE | TLB_V6_U_ASID)

				 TLB_V6_U_FULL | TLB_V6_U_PAGE | \

				 TLB_V6_U_ASID | TLB_V6_BP)



#ifdef CONFIG_CPU_TLB_V7
@@ -430,6 +436,20 @@ static inline void local_flush_tlb_kernel_page(unsigned long kaddr) 
	}

}



static inline void local_flush_bp_all(void)

{

	const int zero = 0;

	const unsigned int __tlb_flag = __cpu_tlb_flags;



	if (tlb_flag(TLB_V7_UIS_BP))

		asm("mcr p15, 0, %0, c7, c1, 6" : : "r" (zero));

	else if (tlb_flag(TLB_V6_BP))

		asm("mcr p15, 0, %0, c7, c5, 6" : : "r" (zero));



	if (tlb_flag(TLB_BARRIER))

		isb();

}



/*

 *	flush_pmd_entry

 *
@@ -480,6 +500,7 @@ static inline void clean_pmd_entry(void *pmd) 
#define flush_tlb_kernel_page	local_flush_tlb_kernel_page

#define flush_tlb_range		local_flush_tlb_range

#define flush_tlb_kernel_range	local_flush_tlb_kernel_range

#define flush_bp_all		local_flush_bp_all

#else

extern void flush_tlb_all(void);

extern void flush_tlb_mm(struct mm_struct *mm);
@@ -487,6 +508,7 @@ extern void flush_tlb_page(struct vm_area_struct *vma, unsigned long uaddr); 
extern void flush_tlb_kernel_page(unsigned long kaddr);

extern void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, unsigned long end);

extern void flush_tlb_kernel_range(unsigned long start, unsigned long end);

extern void flush_bp_all(void);

#endif



/*

arch/arm/include/uapi/asm/unistd.h

+1 −1
Original line number Diff line number Diff line
@@ -404,7 +404,7 @@ 
#define __NR_setns			(__NR_SYSCALL_BASE+375)

#define __NR_process_vm_readv		(__NR_SYSCALL_BASE+376)

#define __NR_process_vm_writev		(__NR_SYSCALL_BASE+377)

					/* 378 for kcmp */

#define __NR_kcmp			(__NR_SYSCALL_BASE+378)

#define __NR_finit_module		(__NR_SYSCALL_BASE+379)



/*