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Commit 19bb62e0 authored by Saranya Chidura's avatar Saranya Chidura
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soc: qcom: dccv2: Add XO clock support 



GCC_DCC_XO_CLK is voted and enabled in
the probe to enable DCC Hardware to write
data in SRAM address space.

Change-Id: I5eb55cfc8bf1f0a539012e179f9a9f944c540579
Signed-off-by: default avatarSaranya Chidura <schidura@codeaurora.org>
parent 34dacfee
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