Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 197d32af authored by Harry Yang's avatar Harry Yang
Browse files

power: smb5-lib: exclusive typec mode operation



In USB Type-C mode, TRY_SINK/TRY_SRC and SRC_ONLY/SNK_ONLY are
mutually exlusive. To make force sink/src operation successful,
clear both TRY_SINK and TRY_SRC settings beforehand, and restore
the settings after switching back to DRP mode.

Change-Id: I7d2b7ea8ed41baef37ec2289ec7c43159cba9a55
Signed-off-by: default avatarHarry Yang <harryy@codeaurora.org>
parent 6148ddd3
Loading
Loading
Loading
Loading
+2 −0
Original line number Diff line number Diff line
@@ -1563,6 +1563,8 @@ static int smb5_configure_typec(struct smb_charger *chg)
		dev_err(chg->dev,
			"Couldn't enable try.snk rc=%d\n", rc);
		return rc;
	} else {
		chg->typec_try_mode |= EN_TRY_SNK_BIT;
	}

	/* configure VCONN for software control */
+3 −2
Original line number Diff line number Diff line
@@ -2729,7 +2729,7 @@ int smblib_set_prop_typec_power_role(struct smb_charger *chg,
		power_role = TYPEC_DISABLE_CMD_BIT;
		break;
	case POWER_SUPPLY_TYPEC_PR_DUAL:
		power_role = 0;
		power_role = chg->typec_try_mode;
		break;
	case POWER_SUPPLY_TYPEC_PR_SINK:
		power_role = EN_SNK_ONLY_BIT;
@@ -2743,7 +2743,8 @@ int smblib_set_prop_typec_power_role(struct smb_charger *chg,
	}

	rc = smblib_masked_write(chg, TYPE_C_MODE_CFG_REG,
				 TYPEC_POWER_ROLE_CMD_MASK, power_role);
				TYPEC_POWER_ROLE_CMD_MASK | TYPEC_TRY_MODE_MASK,
				power_role);
	if (rc < 0) {
		smblib_err(chg, "Couldn't write 0x%02x to TYPE_C_INTRPT_ENB_SOFTWARE_CTRL rc=%d\n",
			power_role, rc);
+1 −0
Original line number Diff line number Diff line
@@ -375,6 +375,7 @@ struct smb_charger {
	bool			jeita_configured;
	int			charger_temp_max;
	int			smb_temp_max;
	u8			typec_try_mode;

	/* workaround flag */
	u32			wa_flags;
+3 −1
Original line number Diff line number Diff line
@@ -322,8 +322,10 @@ enum {
#define U_USB_GROUND_BIT			BIT(4)

#define TYPE_C_MODE_CFG_REG			(TYPEC_BASE + 0x44)
#define TYPEC_POWER_ROLE_CMD_MASK		GENMASK(2, 1)
#define TYPEC_TRY_MODE_MASK			GENMASK(4, 3)
#define EN_TRY_SNK_BIT				BIT(4)
#define EN_TRY_SRC_BIT				BIT(3)
#define TYPEC_POWER_ROLE_CMD_MASK		GENMASK(2, 0)
#define EN_SRC_ONLY_BIT				BIT(2)
#define EN_SNK_ONLY_BIT				BIT(1)
#define TYPEC_DISABLE_CMD_BIT			BIT(0)