Loading Documentation/devicetree/bindings/power/supply/qcom/qpnp-qg.txt +8 −0 Original line number Diff line number Diff line Loading @@ -441,6 +441,14 @@ First Level Node - QGAUGE device value is 90%. This property is valid only if qcom,tcss-enable is defined. - qcom,bass-enable Usage: optional Value type: bool Definition: Enable Battery SOC based SOC scaling. This logic allows monotonic-SOC scaling at low-temperatures when there is variation in system-SOC due to changes in the load. ========================================================== Second Level Nodes - Peripherals managed by QGAUGE driver ========================================================== Loading drivers/power/supply/qcom/qg-core.h +3 −0 Original line number Diff line number Diff line Loading @@ -78,6 +78,7 @@ struct qg_dt { bool fvss_enable; bool multi_profile_load; bool tcss_enable; bool bass_enable; }; struct qg_esr_data { Loading Loading @@ -143,6 +144,7 @@ struct qpnp_qg { bool force_soc; bool fvss_active; bool tcss_active; bool bass_active; int charge_status; int charge_type; int chg_iterm_ma; Loading @@ -159,6 +161,7 @@ struct qpnp_qg { int soc_tcss; int tcss_entry_count; int max_fcc_limit_ma; int bsoc_bass_entry; u32 fifo_done_count; u32 wa_flags; u32 seq_no; Loading drivers/power/supply/qcom/qg-soc.c +51 −0 Original line number Diff line number Diff line Loading @@ -227,6 +227,52 @@ static int qg_process_tcss_soc(struct qpnp_qg *chip, int sys_soc) return sys_soc; } #define BASS_SYS_MSOC_DELTA 2 static int qg_process_bass_soc(struct qpnp_qg *chip, int sys_soc) { int bass_soc = sys_soc, msoc = chip->msoc; int batt_soc = CAP(0, 100, DIV_ROUND_CLOSEST(chip->batt_soc, 100)); if (!chip->dt.bass_enable) goto exit_soc_scale; qg_dbg(chip, QG_DEBUG_SOC, "BASS Entry: fifo_i=%d sys_soc=%d msoc=%d batt_soc=%d fvss_active=%d\n", chip->last_fifo_i_ua, sys_soc, msoc, batt_soc, chip->fvss_active); /* Skip BASS if FVSS is active */ if (chip->fvss_active) goto exit_soc_scale; if (((sys_soc - msoc) < BASS_SYS_MSOC_DELTA) || chip->last_fifo_i_ua <= 0) goto exit_soc_scale; if (!chip->bass_active) { chip->bass_active = true; chip->bsoc_bass_entry = batt_soc; } /* Drop the sys_soc by 1% if batt_soc has dropped */ if ((chip->bsoc_bass_entry - batt_soc) >= 1) { bass_soc = (msoc > 0) ? msoc - 1 : 0; chip->bass_active = false; } qg_dbg(chip, QG_DEBUG_SOC, "BASS Exit: fifo_i_ua=%d sys_soc=%d msoc=%d bsoc_bass_entry=%d batt_soc=%d bass_soc=%d\n", chip->last_fifo_i_ua, sys_soc, msoc, chip->bsoc_bass_entry, chip->batt_soc, bass_soc); return bass_soc; exit_soc_scale: chip->bass_active = false; qg_dbg(chip, QG_DEBUG_SOC, "BASS Quit: enabled=%d fifo_i_ua=%d sys_soc=%d msoc=%d batt_soc=%d\n", chip->dt.bass_enable, chip->last_fifo_i_ua, sys_soc, msoc, chip->batt_soc); return sys_soc; } int qg_adjust_sys_soc(struct qpnp_qg *chip) { int soc, vbat_uv, rc; Loading @@ -234,6 +280,7 @@ int qg_adjust_sys_soc(struct qpnp_qg *chip) chip->sys_soc = CAP(QG_MIN_SOC, QG_MAX_SOC, chip->sys_soc); /* TCSS */ chip->sys_soc = qg_process_tcss_soc(chip, chip->sys_soc); if (chip->sys_soc < 100) { Loading @@ -258,8 +305,12 @@ int qg_adjust_sys_soc(struct qpnp_qg *chip) qg_dbg(chip, QG_DEBUG_SOC, "sys_soc=%d adjusted sys_soc=%d\n", chip->sys_soc, soc); /* FVSS */ soc = qg_process_fvss_soc(chip, soc); /* BASS */ soc = qg_process_bass_soc(chip, soc); chip->last_adj_ssoc = soc; return soc; Loading drivers/power/supply/qcom/qpnp-qg.c +2 −0 Original line number Diff line number Diff line Loading @@ -4120,6 +4120,8 @@ static int qg_parse_dt(struct qpnp_qg *chip) chip->dt.tcss_entry_soc = temp; } chip->dt.bass_enable = of_property_read_bool(node, "qcom,bass-enable"); chip->dt.multi_profile_load = of_property_read_bool(node, "qcom,multi-profile-load"); Loading Loading
Documentation/devicetree/bindings/power/supply/qcom/qpnp-qg.txt +8 −0 Original line number Diff line number Diff line Loading @@ -441,6 +441,14 @@ First Level Node - QGAUGE device value is 90%. This property is valid only if qcom,tcss-enable is defined. - qcom,bass-enable Usage: optional Value type: bool Definition: Enable Battery SOC based SOC scaling. This logic allows monotonic-SOC scaling at low-temperatures when there is variation in system-SOC due to changes in the load. ========================================================== Second Level Nodes - Peripherals managed by QGAUGE driver ========================================================== Loading
drivers/power/supply/qcom/qg-core.h +3 −0 Original line number Diff line number Diff line Loading @@ -78,6 +78,7 @@ struct qg_dt { bool fvss_enable; bool multi_profile_load; bool tcss_enable; bool bass_enable; }; struct qg_esr_data { Loading Loading @@ -143,6 +144,7 @@ struct qpnp_qg { bool force_soc; bool fvss_active; bool tcss_active; bool bass_active; int charge_status; int charge_type; int chg_iterm_ma; Loading @@ -159,6 +161,7 @@ struct qpnp_qg { int soc_tcss; int tcss_entry_count; int max_fcc_limit_ma; int bsoc_bass_entry; u32 fifo_done_count; u32 wa_flags; u32 seq_no; Loading
drivers/power/supply/qcom/qg-soc.c +51 −0 Original line number Diff line number Diff line Loading @@ -227,6 +227,52 @@ static int qg_process_tcss_soc(struct qpnp_qg *chip, int sys_soc) return sys_soc; } #define BASS_SYS_MSOC_DELTA 2 static int qg_process_bass_soc(struct qpnp_qg *chip, int sys_soc) { int bass_soc = sys_soc, msoc = chip->msoc; int batt_soc = CAP(0, 100, DIV_ROUND_CLOSEST(chip->batt_soc, 100)); if (!chip->dt.bass_enable) goto exit_soc_scale; qg_dbg(chip, QG_DEBUG_SOC, "BASS Entry: fifo_i=%d sys_soc=%d msoc=%d batt_soc=%d fvss_active=%d\n", chip->last_fifo_i_ua, sys_soc, msoc, batt_soc, chip->fvss_active); /* Skip BASS if FVSS is active */ if (chip->fvss_active) goto exit_soc_scale; if (((sys_soc - msoc) < BASS_SYS_MSOC_DELTA) || chip->last_fifo_i_ua <= 0) goto exit_soc_scale; if (!chip->bass_active) { chip->bass_active = true; chip->bsoc_bass_entry = batt_soc; } /* Drop the sys_soc by 1% if batt_soc has dropped */ if ((chip->bsoc_bass_entry - batt_soc) >= 1) { bass_soc = (msoc > 0) ? msoc - 1 : 0; chip->bass_active = false; } qg_dbg(chip, QG_DEBUG_SOC, "BASS Exit: fifo_i_ua=%d sys_soc=%d msoc=%d bsoc_bass_entry=%d batt_soc=%d bass_soc=%d\n", chip->last_fifo_i_ua, sys_soc, msoc, chip->bsoc_bass_entry, chip->batt_soc, bass_soc); return bass_soc; exit_soc_scale: chip->bass_active = false; qg_dbg(chip, QG_DEBUG_SOC, "BASS Quit: enabled=%d fifo_i_ua=%d sys_soc=%d msoc=%d batt_soc=%d\n", chip->dt.bass_enable, chip->last_fifo_i_ua, sys_soc, msoc, chip->batt_soc); return sys_soc; } int qg_adjust_sys_soc(struct qpnp_qg *chip) { int soc, vbat_uv, rc; Loading @@ -234,6 +280,7 @@ int qg_adjust_sys_soc(struct qpnp_qg *chip) chip->sys_soc = CAP(QG_MIN_SOC, QG_MAX_SOC, chip->sys_soc); /* TCSS */ chip->sys_soc = qg_process_tcss_soc(chip, chip->sys_soc); if (chip->sys_soc < 100) { Loading @@ -258,8 +305,12 @@ int qg_adjust_sys_soc(struct qpnp_qg *chip) qg_dbg(chip, QG_DEBUG_SOC, "sys_soc=%d adjusted sys_soc=%d\n", chip->sys_soc, soc); /* FVSS */ soc = qg_process_fvss_soc(chip, soc); /* BASS */ soc = qg_process_bass_soc(chip, soc); chip->last_adj_ssoc = soc; return soc; Loading
drivers/power/supply/qcom/qpnp-qg.c +2 −0 Original line number Diff line number Diff line Loading @@ -4120,6 +4120,8 @@ static int qg_parse_dt(struct qpnp_qg *chip) chip->dt.tcss_entry_soc = temp; } chip->dt.bass_enable = of_property_read_bool(node, "qcom,bass-enable"); chip->dt.multi_profile_load = of_property_read_bool(node, "qcom,multi-profile-load"); Loading