Loading drivers/gpu/drm/msm/sde/sde_hw_color_proc_v4.c +42 −7 Original line number Diff line number Diff line /* Copyright (c) 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -15,7 +15,8 @@ static int sde_write_3d_gamut(struct sde_hw_blk_reg_map *hw, struct drm_msm_3d_gamut *payload, u32 base, u32 *opcode) u32 *opcode, u32 pipe, u32 scale_tbl_a_len, u32 scale_tbl_b_len) { u32 reg, tbl_len, tbl_off, scale_off, i, j; u32 scale_tbl_len, scale_tbl_off; Loading @@ -31,8 +32,19 @@ static int sde_write_3d_gamut(struct sde_hw_blk_reg_map *hw, case GAMUT_3D_MODE_17: tbl_len = GAMUT_3D_MODE17_TBL_SZ; tbl_off = 0; if (pipe == DSPP) { scale_off = GAMUT_SCALEA_OFFSET_OFF; *opcode = gamut_mode_17 << 2; *opcode = gamut_mode_17; } else { *opcode = (*opcode & (BIT(5) - 1)) >> 2; if (*opcode == gamut_mode_17b) *opcode = gamut_mode_17; else *opcode = gamut_mode_17b; scale_off = (*opcode == gamut_mode_17) ? GAMUT_SCALEA_OFFSET_OFF : GAMUT_SCALEB_OFFSET_OFF; } break; case GAMUT_3D_MODE_13: *opcode = (*opcode & (BIT(4) - 1)) >> 2; Loading Loading @@ -76,9 +88,9 @@ static int sde_write_3d_gamut(struct sde_hw_blk_reg_map *hw, if ((*opcode & GAMUT_MAP_EN)) { if (scale_off == GAMUT_SCALEA_OFFSET_OFF) scale_tbl_len = GAMUT_3D_SCALE_OFF_SZ; scale_tbl_len = scale_tbl_a_len; else scale_tbl_len = GAMUT_3D_SCALEB_OFF_SZ; scale_tbl_len = scale_tbl_b_len; for (i = 0; i < GAMUT_3D_SCALE_OFF_TBL_NUM; i++) { scale_tbl_off = base + scale_off + i * scale_tbl_len * sizeof(u32); Loading Loading @@ -113,8 +125,31 @@ void sde_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) payload = hw_cfg->payload; sde_write_3d_gamut(&ctx->hw, payload, ctx->cap->sblk->gamut.base, &op_mode); &op_mode, DSPP, GAMUT_3D_SCALE_OFF_SZ, GAMUT_3D_SCALEB_OFF_SZ); } void sde_setup_dspp_3d_gamutv41(struct sde_hw_dspp *ctx, void *cfg) { struct drm_msm_3d_gamut *payload; struct sde_hw_cp_cfg *hw_cfg = cfg; u32 op_mode; if (!ctx || !cfg) { DRM_ERROR("invalid param ctx %pK cfg %pK\n", ctx, cfg); return; } op_mode = SDE_REG_READ(&ctx->hw, ctx->cap->sblk->gamut.base); if (!hw_cfg->payload) { DRM_DEBUG_DRIVER("disable gamut feature\n"); SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->gamut.base, 0); return; } payload = hw_cfg->payload; sde_write_3d_gamut(&ctx->hw, payload, ctx->cap->sblk->gamut.base, &op_mode, DSPP, GAMUT_3D_SCALE_OFF_SZ, GAMUT_3D_SCALE_OFF_SZ); } void sde_setup_dspp_igcv3(struct sde_hw_dspp *ctx, void *cfg) Loading drivers/gpu/drm/msm/sde/sde_hw_color_proc_v4.h +11 −1 Original line number Diff line number Diff line /* Copyright (c) 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -22,6 +22,15 @@ * @cfg: pointer to sde_hw_cp_cfg */ void sde_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg); /** * sde_setup_dspp_3d_gamutv41 - Function for 3d gamut v4_1 version feature * programming. * @ctx: dspp ctx pointer * @cfg: pointer to sde_hw_cp_cfg */ void sde_setup_dspp_3d_gamutv41(struct sde_hw_dspp *ctx, void *cfg); /** * sde_setup_dspp_igcv3 - Function for igc v3 version feature * programming. Loading @@ -29,6 +38,7 @@ void sde_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg); * @cfg: pointer to sde_hw_cp_cfg */ void sde_setup_dspp_igcv3(struct sde_hw_dspp *ctx, void *cfg); /** * sde_setup_dspp_pccv4 - Function for pcc v4 version feature * programming. Loading drivers/gpu/drm/msm/sde/sde_hw_dspp.c +11 −1 Original line number Diff line number Diff line /* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -131,6 +131,16 @@ static void _setup_dspp_ops(struct sde_hw_dspp *c, unsigned long features) else c->ops.setup_gamut = sde_setup_dspp_3d_gamutv4; } else if (c->cap->sblk->gamut.version == SDE_COLOR_PROCESS_VER(0x4, 1)) { ret = reg_dmav1_init_dspp_op_v4(i, c->idx); if (!ret) { c->ops.setup_gamut = reg_dmav1_setup_dspp_3d_gamutv41; } else { c->ops.setup_gamut = sde_setup_dspp_3d_gamutv41; } } break; case SDE_DSPP_GC: Loading drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.c +16 −3 Original line number Diff line number Diff line Loading @@ -481,7 +481,8 @@ static void dspp_3d_gamutv4_off(struct sde_hw_dspp *ctx, void *cfg) DRM_ERROR("failed to kick off ret %d\n", rc); } void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) static void reg_dmav1_setup_dspp_3d_gamutv4_common(struct sde_hw_dspp *ctx, void *cfg, u32 scale_tbl_a_len, u32 scale_tbl_b_len) { struct drm_msm_3d_gamut *payload; struct sde_reg_dma_kickoff_cfg kick_off; Loading Loading @@ -553,9 +554,9 @@ void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) if (op_mode & GAMUT_MAP_EN) { if (scale_off == GAMUT_SCALEA_OFFSET_OFF) scale_tbl_len = GAMUT_SCALE_OFF_LEN; scale_tbl_len = scale_tbl_a_len; else scale_tbl_len = GAMUT_SCALE_OFF_LEN_12; scale_tbl_len = scale_tbl_b_len; for (i = 0; i < GAMUT_3D_SCALE_OFF_TBL_NUM; i++) { scale_tbl_off = ctx->cap->sblk->gamut.base + scale_off + Loading Loading @@ -589,6 +590,18 @@ void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) DRM_ERROR("failed to kick off ret %d\n", rc); } void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) { reg_dmav1_setup_dspp_3d_gamutv4_common(ctx, cfg, GAMUT_SCALE_OFF_LEN, GAMUT_SCALE_OFF_LEN_12); } void reg_dmav1_setup_dspp_3d_gamutv41(struct sde_hw_dspp *ctx, void *cfg) { reg_dmav1_setup_dspp_3d_gamutv4_common(ctx, cfg, GAMUT_SCALE_OFF_LEN, GAMUT_SCALE_OFF_LEN); } void reg_dmav1_setup_dspp_gcv18(struct sde_hw_dspp *ctx, void *cfg) { struct drm_msm_pgc_lut *lut_cfg; Loading drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.h +7 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,13 @@ void reg_dmav1_setup_dspp_vlutv18(struct sde_hw_dspp *ctx, void *cfg); */ void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg); /** * reg_dmav1_setup_3d_gamutv41() - gamut v4_1 implementation using reg dma v1. * @ctx: dspp ctx info * @cfg: pointer to struct sde_hw_cp_cfg */ void reg_dmav1_setup_dspp_3d_gamutv41(struct sde_hw_dspp *ctx, void *cfg); /** * reg_dmav1_setup_dspp_gcv18() - gc v18 implementation using reg dma v1. * @ctx: dspp ctx info Loading Loading
drivers/gpu/drm/msm/sde/sde_hw_color_proc_v4.c +42 −7 Original line number Diff line number Diff line /* Copyright (c) 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -15,7 +15,8 @@ static int sde_write_3d_gamut(struct sde_hw_blk_reg_map *hw, struct drm_msm_3d_gamut *payload, u32 base, u32 *opcode) u32 *opcode, u32 pipe, u32 scale_tbl_a_len, u32 scale_tbl_b_len) { u32 reg, tbl_len, tbl_off, scale_off, i, j; u32 scale_tbl_len, scale_tbl_off; Loading @@ -31,8 +32,19 @@ static int sde_write_3d_gamut(struct sde_hw_blk_reg_map *hw, case GAMUT_3D_MODE_17: tbl_len = GAMUT_3D_MODE17_TBL_SZ; tbl_off = 0; if (pipe == DSPP) { scale_off = GAMUT_SCALEA_OFFSET_OFF; *opcode = gamut_mode_17 << 2; *opcode = gamut_mode_17; } else { *opcode = (*opcode & (BIT(5) - 1)) >> 2; if (*opcode == gamut_mode_17b) *opcode = gamut_mode_17; else *opcode = gamut_mode_17b; scale_off = (*opcode == gamut_mode_17) ? GAMUT_SCALEA_OFFSET_OFF : GAMUT_SCALEB_OFFSET_OFF; } break; case GAMUT_3D_MODE_13: *opcode = (*opcode & (BIT(4) - 1)) >> 2; Loading Loading @@ -76,9 +88,9 @@ static int sde_write_3d_gamut(struct sde_hw_blk_reg_map *hw, if ((*opcode & GAMUT_MAP_EN)) { if (scale_off == GAMUT_SCALEA_OFFSET_OFF) scale_tbl_len = GAMUT_3D_SCALE_OFF_SZ; scale_tbl_len = scale_tbl_a_len; else scale_tbl_len = GAMUT_3D_SCALEB_OFF_SZ; scale_tbl_len = scale_tbl_b_len; for (i = 0; i < GAMUT_3D_SCALE_OFF_TBL_NUM; i++) { scale_tbl_off = base + scale_off + i * scale_tbl_len * sizeof(u32); Loading Loading @@ -113,8 +125,31 @@ void sde_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) payload = hw_cfg->payload; sde_write_3d_gamut(&ctx->hw, payload, ctx->cap->sblk->gamut.base, &op_mode); &op_mode, DSPP, GAMUT_3D_SCALE_OFF_SZ, GAMUT_3D_SCALEB_OFF_SZ); } void sde_setup_dspp_3d_gamutv41(struct sde_hw_dspp *ctx, void *cfg) { struct drm_msm_3d_gamut *payload; struct sde_hw_cp_cfg *hw_cfg = cfg; u32 op_mode; if (!ctx || !cfg) { DRM_ERROR("invalid param ctx %pK cfg %pK\n", ctx, cfg); return; } op_mode = SDE_REG_READ(&ctx->hw, ctx->cap->sblk->gamut.base); if (!hw_cfg->payload) { DRM_DEBUG_DRIVER("disable gamut feature\n"); SDE_REG_WRITE(&ctx->hw, ctx->cap->sblk->gamut.base, 0); return; } payload = hw_cfg->payload; sde_write_3d_gamut(&ctx->hw, payload, ctx->cap->sblk->gamut.base, &op_mode, DSPP, GAMUT_3D_SCALE_OFF_SZ, GAMUT_3D_SCALE_OFF_SZ); } void sde_setup_dspp_igcv3(struct sde_hw_dspp *ctx, void *cfg) Loading
drivers/gpu/drm/msm/sde/sde_hw_color_proc_v4.h +11 −1 Original line number Diff line number Diff line /* Copyright (c) 2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2017-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading @@ -22,6 +22,15 @@ * @cfg: pointer to sde_hw_cp_cfg */ void sde_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg); /** * sde_setup_dspp_3d_gamutv41 - Function for 3d gamut v4_1 version feature * programming. * @ctx: dspp ctx pointer * @cfg: pointer to sde_hw_cp_cfg */ void sde_setup_dspp_3d_gamutv41(struct sde_hw_dspp *ctx, void *cfg); /** * sde_setup_dspp_igcv3 - Function for igc v3 version feature * programming. Loading @@ -29,6 +38,7 @@ void sde_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg); * @cfg: pointer to sde_hw_cp_cfg */ void sde_setup_dspp_igcv3(struct sde_hw_dspp *ctx, void *cfg); /** * sde_setup_dspp_pccv4 - Function for pcc v4 version feature * programming. Loading
drivers/gpu/drm/msm/sde/sde_hw_dspp.c +11 −1 Original line number Diff line number Diff line /* Copyright (c) 2015-2017, The Linux Foundation. All rights reserved. /* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved. * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 and Loading Loading @@ -131,6 +131,16 @@ static void _setup_dspp_ops(struct sde_hw_dspp *c, unsigned long features) else c->ops.setup_gamut = sde_setup_dspp_3d_gamutv4; } else if (c->cap->sblk->gamut.version == SDE_COLOR_PROCESS_VER(0x4, 1)) { ret = reg_dmav1_init_dspp_op_v4(i, c->idx); if (!ret) { c->ops.setup_gamut = reg_dmav1_setup_dspp_3d_gamutv41; } else { c->ops.setup_gamut = sde_setup_dspp_3d_gamutv41; } } break; case SDE_DSPP_GC: Loading
drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.c +16 −3 Original line number Diff line number Diff line Loading @@ -481,7 +481,8 @@ static void dspp_3d_gamutv4_off(struct sde_hw_dspp *ctx, void *cfg) DRM_ERROR("failed to kick off ret %d\n", rc); } void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) static void reg_dmav1_setup_dspp_3d_gamutv4_common(struct sde_hw_dspp *ctx, void *cfg, u32 scale_tbl_a_len, u32 scale_tbl_b_len) { struct drm_msm_3d_gamut *payload; struct sde_reg_dma_kickoff_cfg kick_off; Loading Loading @@ -553,9 +554,9 @@ void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) if (op_mode & GAMUT_MAP_EN) { if (scale_off == GAMUT_SCALEA_OFFSET_OFF) scale_tbl_len = GAMUT_SCALE_OFF_LEN; scale_tbl_len = scale_tbl_a_len; else scale_tbl_len = GAMUT_SCALE_OFF_LEN_12; scale_tbl_len = scale_tbl_b_len; for (i = 0; i < GAMUT_3D_SCALE_OFF_TBL_NUM; i++) { scale_tbl_off = ctx->cap->sblk->gamut.base + scale_off + Loading Loading @@ -589,6 +590,18 @@ void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) DRM_ERROR("failed to kick off ret %d\n", rc); } void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg) { reg_dmav1_setup_dspp_3d_gamutv4_common(ctx, cfg, GAMUT_SCALE_OFF_LEN, GAMUT_SCALE_OFF_LEN_12); } void reg_dmav1_setup_dspp_3d_gamutv41(struct sde_hw_dspp *ctx, void *cfg) { reg_dmav1_setup_dspp_3d_gamutv4_common(ctx, cfg, GAMUT_SCALE_OFF_LEN, GAMUT_SCALE_OFF_LEN); } void reg_dmav1_setup_dspp_gcv18(struct sde_hw_dspp *ctx, void *cfg) { struct drm_msm_pgc_lut *lut_cfg; Loading
drivers/gpu/drm/msm/sde/sde_hw_reg_dma_v1_color_proc.h +7 −0 Original line number Diff line number Diff line Loading @@ -39,6 +39,13 @@ void reg_dmav1_setup_dspp_vlutv18(struct sde_hw_dspp *ctx, void *cfg); */ void reg_dmav1_setup_dspp_3d_gamutv4(struct sde_hw_dspp *ctx, void *cfg); /** * reg_dmav1_setup_3d_gamutv41() - gamut v4_1 implementation using reg dma v1. * @ctx: dspp ctx info * @cfg: pointer to struct sde_hw_cp_cfg */ void reg_dmav1_setup_dspp_3d_gamutv41(struct sde_hw_dspp *ctx, void *cfg); /** * reg_dmav1_setup_dspp_gcv18() - gc v18 implementation using reg dma v1. * @ctx: dspp ctx info Loading