Merge branch 'for-linus' of git://github.com/cmetcalf-tilera/linux-tile (15831714) · Commits · e / devices / android_kernel_xiaomi_nabu

arch/tile/include/arch/Kbuild

0 → 100644

+17 −0

Original line number	Diff line number	Diff line
		header-y += abi.h
		header-y += chip.h
		header-y += chip_tile64.h
		header-y += chip_tilegx.h
		header-y += chip_tilepro.h
		header-y += icache.h
		header-y += interrupts.h
		header-y += interrupts_32.h
		header-y += interrupts_64.h
		header-y += opcode.h
		header-y += opcode_tilegx.h
		header-y += opcode_tilepro.h
		header-y += sim.h
		header-y += sim_def.h
		header-y += spr_def.h
		header-y += spr_def_32.h
		header-y += spr_def_64.h

arch/tile/include/arch/abi.h

+72 −27

Original line number	Diff line number	Diff line
		@@ -15,13 +15,78 @@
		/**
		* @file
		*
		* ABI-related register definitions helpful when writing assembly code.
		* ABI-related register definitions.
		*/

		#ifndef __ARCH_ABI_H__

		#if !defined __need_int_reg_t && !defined __DOXYGEN__
		# define __ARCH_ABI_H__
		# include <arch/chip.h>
		#endif

		/* Provide the basic machine types. */
		#ifndef __INT_REG_BITS

		/** Number of bits in a register. */
		#if defined __tilegx__
		# define __INT_REG_BITS 64
		#elif defined __tilepro__
		# define __INT_REG_BITS 32
		#elif !defined __need_int_reg_t
		# include <arch/chip.h>
		# define __INT_REG_BITS CHIP_WORD_SIZE()
		#else
		# error Unrecognized architecture with __need_int_reg_t
		#endif

		#if __INT_REG_BITS == 64

		#ifndef __ASSEMBLER__
		/** Unsigned type that can hold a register. */
		typedef unsigned long long __uint_reg_t;

		/** Signed type that can hold a register. */
		typedef long long __int_reg_t;
		#endif

		/** String prefix to use for printf(). */
		#define __INT_REG_FMT "ll"

		#else

		#ifndef __ASSEMBLER__
		/** Unsigned type that can hold a register. */
		typedef unsigned long __uint_reg_t;

		/** Signed type that can hold a register. */
		typedef long __int_reg_t;
		#endif

		/** String prefix to use for printf(). */
		#define __INT_REG_FMT "l"

		#endif
		#endif /* __INT_REG_BITS */


		#ifndef __need_int_reg_t


		#ifndef __ASSEMBLER__
		/** Unsigned type that can hold a register. */
		typedef __uint_reg_t uint_reg_t;

		/** Signed type that can hold a register. */
		typedef __int_reg_t int_reg_t;
		#endif

		/** String prefix to use for printf(). */
		#define INT_REG_FMT __INT_REG_FMT

		/** Number of bits in a register. */
		#define INT_REG_BITS __INT_REG_BITS


		/* Registers 0 - 55 are "normal", but some perform special roles. */

		@@ -59,7 +124,7 @@
		* The ABI requires callers to allocate a caller state save area of
		* this many bytes at the bottom of each stack frame.
		*/
		#define C_ABI_SAVE_AREA_SIZE (2 * (CHIP_WORD_SIZE() / 8))
		#define C_ABI_SAVE_AREA_SIZE (2 * (INT_REG_BITS / 8))

		/**
		* The operand to an 'info' opcode directing the backtracer to not
		@@ -67,30 +132,10 @@
		*/
		#define INFO_OP_CANNOT_BACKTRACE 2

		#ifndef __ASSEMBLER__
		#if CHIP_WORD_SIZE() > 32

		/** Unsigned type that can hold a register. */
		typedef unsigned long long uint_reg_t;

		/** Signed type that can hold a register. */
		typedef long long int_reg_t;
		#endif /* !__need_int_reg_t */

		/** String prefix to use for printf(). */
		#define INT_REG_FMT "ll"

		#elif !defined(__LP64__) /* avoid confusion with LP64 cross-build tools */

		/** Unsigned type that can hold a register. */
		typedef unsigned long uint_reg_t;

		/** Signed type that can hold a register. */
		typedef long int_reg_t;

		/** String prefix to use for printf(). */
		#define INT_REG_FMT "l"

		#endif
		#endif /* __ASSEMBLER__ */
		/* Make sure we later can get all the definitions and declarations. */
		#undef __need_int_reg_t

		#endif /* !__ARCH_ABI_H__ */

arch/tile/include/asm/opcode_constants.h→arch/tile/include/arch/opcode.h

+6 −11

Original line number	Diff line number	Diff line
		/*
		* Copyright 2010 Tilera Corporation. All Rights Reserved.
		* Copyright 2011 Tilera Corporation. All Rights Reserved.
		*
		* This program is free software; you can redistribute it and/or
		* modify it under the terms of the GNU General Public License
		@@ -12,15 +12,10 @@
		* more details.
		*/

		#ifndef _ASM_TILE_OPCODE_CONSTANTS_H
		#define _ASM_TILE_OPCODE_CONSTANTS_H

		#include <arch/chip.h>

		#if CHIP_WORD_SIZE() == 64
		#include <asm/opcode_constants_64.h>
		#if defined(__tilepro__)
		#include <arch/opcode_tilepro.h>
		#elif defined(__tilegx__)
		#include <arch/opcode_tilegx.h>
		#else
		#include <asm/opcode_constants_32.h>
		#error Unexpected Tilera chip type
		#endif

		#endif /* _ASM_TILE_OPCODE_CONSTANTS_H */

arch/tile/include/asm/opcode_constants_64.h→arch/tile/include/arch/opcode_tilegx.h

+801 −5

Original line number	Diff line number	Diff line
		/*
		/* TILE-Gx opcode information.
		*
		* Copyright 2011 Tilera Corporation. All Rights Reserved.
		*
		* This program is free software; you can redistribute it and/or
		@@ -10,13 +11,805 @@
		* MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
		* NON INFRINGEMENT. See the GNU General Public License for
		* more details.
		*
		*
		*
		*
		*
		*/

		/* This file is machine-generated; DO NOT EDIT! */
		#ifndef __ARCH_OPCODE_H__
		#define __ARCH_OPCODE_H__

		#ifndef __ASSEMBLER__

		typedef unsigned long long tilegx_bundle_bits;

		/* These are the bits that determine if a bundle is in the X encoding. */
		#define TILEGX_BUNDLE_MODE_MASK ((tilegx_bundle_bits)3 << 62)

		enum
		{
		/* Maximum number of instructions in a bundle (2 for X, 3 for Y). */
		TILEGX_MAX_INSTRUCTIONS_PER_BUNDLE = 3,

		/* How many different pipeline encodings are there? X0, X1, Y0, Y1, Y2. */
		TILEGX_NUM_PIPELINE_ENCODINGS = 5,

		/* Log base 2 of TILEGX_BUNDLE_SIZE_IN_BYTES. */
		TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES = 3,

		/* Instructions take this many bytes. */
		TILEGX_BUNDLE_SIZE_IN_BYTES = 1 << TILEGX_LOG2_BUNDLE_SIZE_IN_BYTES,

		/* Log base 2 of TILEGX_BUNDLE_ALIGNMENT_IN_BYTES. */
		TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES = 3,

		/* Bundles should be aligned modulo this number of bytes. */
		TILEGX_BUNDLE_ALIGNMENT_IN_BYTES =
		(1 << TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES),

		/* Number of registers (some are magic, such as network I/O). */
		TILEGX_NUM_REGISTERS = 64,
		};

		/* Make a few "tile_" variables to simplify common code between
		architectures. */

		typedef tilegx_bundle_bits tile_bundle_bits;
		#define TILE_BUNDLE_SIZE_IN_BYTES TILEGX_BUNDLE_SIZE_IN_BYTES
		#define TILE_BUNDLE_ALIGNMENT_IN_BYTES TILEGX_BUNDLE_ALIGNMENT_IN_BYTES
		#define TILE_LOG2_BUNDLE_ALIGNMENT_IN_BYTES \
		TILEGX_LOG2_BUNDLE_ALIGNMENT_IN_BYTES

		/* 64-bit pattern for a { bpt ; nop } bundle. */
		#define TILEGX_BPT_BUNDLE 0x286a44ae51485000ULL

		static __inline unsigned int
		get_BFEnd_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0x3f);
		}

		static __inline unsigned int
		get_BFOpcodeExtension_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 24)) & 0xf);
		}

		static __inline unsigned int
		get_BFStart_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 18)) & 0x3f);
		}

		static __inline unsigned int
		get_BrOff_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 31)) & 0x0000003f) \|
		(((unsigned int)(n >> 37)) & 0x0001ffc0);
		}

		static __inline unsigned int
		get_BrType_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 54)) & 0x1f);
		}

		static __inline unsigned int
		get_Dest_Imm8_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 31)) & 0x0000003f) \|
		(((unsigned int)(n >> 43)) & 0x000000c0);
		}

		static __inline unsigned int
		get_Dest_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 0)) & 0x3f);
		}

		static __inline unsigned int
		get_Dest_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 31)) & 0x3f);
		}

		static __inline unsigned int
		get_Dest_Y0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 0)) & 0x3f);
		}

		static __inline unsigned int
		get_Dest_Y1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 31)) & 0x3f);
		}

		static __inline unsigned int
		get_Imm16_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0xffff);
		}

		static __inline unsigned int
		get_Imm16_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 43)) & 0xffff);
		}

		static __inline unsigned int
		get_Imm8OpcodeExtension_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 20)) & 0xff);
		}

		static __inline unsigned int
		get_Imm8OpcodeExtension_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 51)) & 0xff);
		}

		static __inline unsigned int
		get_Imm8_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0xff);
		}

		static __inline unsigned int
		get_Imm8_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 43)) & 0xff);
		}

		static __inline unsigned int
		get_Imm8_Y0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0xff);
		}

		static __inline unsigned int
		get_Imm8_Y1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 43)) & 0xff);
		}

		static __inline unsigned int
		get_JumpOff_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 31)) & 0x7ffffff);
		}

		static __inline unsigned int
		get_JumpOpcodeExtension_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 58)) & 0x1);
		}

		static __inline unsigned int
		get_MF_Imm14_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 37)) & 0x3fff);
		}

		static __inline unsigned int
		get_MT_Imm14_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 31)) & 0x0000003f) \|
		(((unsigned int)(n >> 37)) & 0x00003fc0);
		}

		static __inline unsigned int
		get_Mode(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 62)) & 0x3);
		}

		static __inline unsigned int
		get_Opcode_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 28)) & 0x7);
		}

		static __inline unsigned int
		get_Opcode_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 59)) & 0x7);
		}

		static __inline unsigned int
		get_Opcode_Y0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 27)) & 0xf);
		}

		static __inline unsigned int
		get_Opcode_Y1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 58)) & 0xf);
		}

		static __inline unsigned int
		get_Opcode_Y2(tilegx_bundle_bits n)
		{
		return (((n >> 26)) & 0x00000001) \|
		(((unsigned int)(n >> 56)) & 0x00000002);
		}

		static __inline unsigned int
		get_RRROpcodeExtension_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 18)) & 0x3ff);
		}

		static __inline unsigned int
		get_RRROpcodeExtension_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 49)) & 0x3ff);
		}

		static __inline unsigned int
		get_RRROpcodeExtension_Y0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 18)) & 0x3);
		}

		static __inline unsigned int
		get_RRROpcodeExtension_Y1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 49)) & 0x3);
		}

		static __inline unsigned int
		get_ShAmt_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0x3f);
		}

		static __inline unsigned int
		get_ShAmt_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 43)) & 0x3f);
		}

		static __inline unsigned int
		get_ShAmt_Y0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0x3f);
		}

		static __inline unsigned int
		get_ShAmt_Y1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 43)) & 0x3f);
		}

		static __inline unsigned int
		get_ShiftOpcodeExtension_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 18)) & 0x3ff);
		}

		static __inline unsigned int
		get_ShiftOpcodeExtension_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 49)) & 0x3ff);
		}

		static __inline unsigned int
		get_ShiftOpcodeExtension_Y0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 18)) & 0x3);
		}

		static __inline unsigned int
		get_ShiftOpcodeExtension_Y1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 49)) & 0x3);
		}

		static __inline unsigned int
		get_SrcA_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 6)) & 0x3f);
		}

		static __inline unsigned int
		get_SrcA_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 37)) & 0x3f);
		}

		static __inline unsigned int
		get_SrcA_Y0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 6)) & 0x3f);
		}

		static __inline unsigned int
		get_SrcA_Y1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 37)) & 0x3f);
		}

		static __inline unsigned int
		get_SrcA_Y2(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 20)) & 0x3f);
		}

		static __inline unsigned int
		get_SrcBDest_Y2(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 51)) & 0x3f);
		}

		static __inline unsigned int
		get_SrcB_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0x3f);
		}

		static __inline unsigned int
		get_SrcB_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 43)) & 0x3f);
		}

		static __inline unsigned int
		get_SrcB_Y0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0x3f);
		}

		static __inline unsigned int
		get_SrcB_Y1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 43)) & 0x3f);
		}

		static __inline unsigned int
		get_UnaryOpcodeExtension_X0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0x3f);
		}

		static __inline unsigned int
		get_UnaryOpcodeExtension_X1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 43)) & 0x3f);
		}

		static __inline unsigned int
		get_UnaryOpcodeExtension_Y0(tilegx_bundle_bits num)
		{
		const unsigned int n = (unsigned int)num;
		return (((n >> 12)) & 0x3f);
		}

		static __inline unsigned int
		get_UnaryOpcodeExtension_Y1(tilegx_bundle_bits n)
		{
		return (((unsigned int)(n >> 43)) & 0x3f);
		}


		static __inline int
		sign_extend(int n, int num_bits)
		{
		int shift = (int)(sizeof(int) * 8 - num_bits);
		return (n << shift) >> shift;
		}



		static __inline tilegx_bundle_bits
		create_BFEnd_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 12);
		}

		static __inline tilegx_bundle_bits
		create_BFOpcodeExtension_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0xf) << 24);
		}

		static __inline tilegx_bundle_bits
		create_BFStart_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 18);
		}

		static __inline tilegx_bundle_bits
		create_BrOff_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) \|
		(((tilegx_bundle_bits)(n & 0x0001ffc0)) << 37);
		}

		static __inline tilegx_bundle_bits
		create_BrType_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x1f)) << 54);
		}

		static __inline tilegx_bundle_bits
		create_Dest_Imm8_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) \|
		(((tilegx_bundle_bits)(n & 0x000000c0)) << 43);
		}

		static __inline tilegx_bundle_bits
		create_Dest_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 0);
		}

		static __inline tilegx_bundle_bits
		create_Dest_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 31);
		}

		static __inline tilegx_bundle_bits
		create_Dest_Y0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 0);
		}

		static __inline tilegx_bundle_bits
		create_Dest_Y1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 31);
		}

		static __inline tilegx_bundle_bits
		create_Imm16_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0xffff) << 12);
		}

		static __inline tilegx_bundle_bits
		create_Imm16_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0xffff)) << 43);
		}

		static __inline tilegx_bundle_bits
		create_Imm8OpcodeExtension_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0xff) << 20);
		}

		static __inline tilegx_bundle_bits
		create_Imm8OpcodeExtension_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0xff)) << 51);
		}

		static __inline tilegx_bundle_bits
		create_Imm8_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0xff) << 12);
		}

		static __inline tilegx_bundle_bits
		create_Imm8_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0xff)) << 43);
		}

		static __inline tilegx_bundle_bits
		create_Imm8_Y0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0xff) << 12);
		}

		static __inline tilegx_bundle_bits
		create_Imm8_Y1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0xff)) << 43);
		}

		static __inline tilegx_bundle_bits
		create_JumpOff_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x7ffffff)) << 31);
		}

		static __inline tilegx_bundle_bits
		create_JumpOpcodeExtension_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x1)) << 58);
		}

		static __inline tilegx_bundle_bits
		create_MF_Imm14_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3fff)) << 37);
		}

		static __inline tilegx_bundle_bits
		create_MT_Imm14_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x0000003f)) << 31) \|
		(((tilegx_bundle_bits)(n & 0x00003fc0)) << 37);
		}

		static __inline tilegx_bundle_bits
		create_Mode(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3)) << 62);
		}

		static __inline tilegx_bundle_bits
		create_Opcode_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x7) << 28);
		}

		static __inline tilegx_bundle_bits
		create_Opcode_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x7)) << 59);
		}

		static __inline tilegx_bundle_bits
		create_Opcode_Y0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0xf) << 27);
		}

		static __inline tilegx_bundle_bits
		create_Opcode_Y1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0xf)) << 58);
		}

		static __inline tilegx_bundle_bits
		create_Opcode_Y2(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x00000001) << 26) \|
		(((tilegx_bundle_bits)(n & 0x00000002)) << 56);
		}

		static __inline tilegx_bundle_bits
		create_RRROpcodeExtension_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3ff) << 18);
		}

		static __inline tilegx_bundle_bits
		create_RRROpcodeExtension_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3ff)) << 49);
		}

		static __inline tilegx_bundle_bits
		create_RRROpcodeExtension_Y0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3) << 18);
		}

		static __inline tilegx_bundle_bits
		create_RRROpcodeExtension_Y1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3)) << 49);
		}

		static __inline tilegx_bundle_bits
		create_ShAmt_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 12);
		}

		static __inline tilegx_bundle_bits
		create_ShAmt_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
		}

		static __inline tilegx_bundle_bits
		create_ShAmt_Y0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 12);
		}

		static __inline tilegx_bundle_bits
		create_ShAmt_Y1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
		}

		static __inline tilegx_bundle_bits
		create_ShiftOpcodeExtension_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3ff) << 18);
		}

		static __inline tilegx_bundle_bits
		create_ShiftOpcodeExtension_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3ff)) << 49);
		}

		static __inline tilegx_bundle_bits
		create_ShiftOpcodeExtension_Y0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3) << 18);
		}

		static __inline tilegx_bundle_bits
		create_ShiftOpcodeExtension_Y1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3)) << 49);
		}

		static __inline tilegx_bundle_bits
		create_SrcA_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 6);
		}

		static __inline tilegx_bundle_bits
		create_SrcA_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 37);
		}

		static __inline tilegx_bundle_bits
		create_SrcA_Y0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 6);
		}

		static __inline tilegx_bundle_bits
		create_SrcA_Y1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 37);
		}

		static __inline tilegx_bundle_bits
		create_SrcA_Y2(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 20);
		}

		static __inline tilegx_bundle_bits
		create_SrcBDest_Y2(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 51);
		}

		static __inline tilegx_bundle_bits
		create_SrcB_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 12);
		}

		static __inline tilegx_bundle_bits
		create_SrcB_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
		}

		static __inline tilegx_bundle_bits
		create_SrcB_Y0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 12);
		}

		static __inline tilegx_bundle_bits
		create_SrcB_Y1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
		}

		static __inline tilegx_bundle_bits
		create_UnaryOpcodeExtension_X0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 12);
		}

		static __inline tilegx_bundle_bits
		create_UnaryOpcodeExtension_X1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
		}

		static __inline tilegx_bundle_bits
		create_UnaryOpcodeExtension_Y0(int num)
		{
		const unsigned int n = (unsigned int)num;
		return ((n & 0x3f) << 12);
		}

		static __inline tilegx_bundle_bits
		create_UnaryOpcodeExtension_Y1(int num)
		{
		const unsigned int n = (unsigned int)num;
		return (((tilegx_bundle_bits)(n & 0x3f)) << 43);
		}


		#ifndef _TILE_OPCODE_CONSTANTS_H
		#define _TILE_OPCODE_CONSTANTS_H
		enum
		{
		ADDI_IMM8_OPCODE_X0 = 1,
		@@ -606,4 +1399,7 @@ enum
		XOR_RRR_5_OPCODE_Y1 = 3
		};

		#endif /* !_TILE_OPCODE_CONSTANTS_H */

		#endif /* __ASSEMBLER__ */

		#endif /* __ARCH_OPCODE_H__ */

arch/tile/include/asm/opcode_constants_32.h→arch/tile/include/arch/opcode_tilepro.h

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