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Commit 142ff8b8 authored by Subbaraman Narayanamurthy's avatar Subbaraman Narayanamurthy
Browse files

power: qpnp-qnovo5: Initialize QNOVO_PHASE and QNOVO_P2_TICK registers 



As per the hardware recommendation, QNOVO_PHASE and QNOVO_P2_TICK
registers needs to be initialized with zero whenever the pulse
train is enabled. Add support for it.

Change-Id: I8ca988ae35d503df7258e9e35d887dda05e72203
Signed-off-by: default avatarSubbaraman Narayanamurthy <subbaram@codeaurora.org>
parent b3e84100

drivers/power/supply/qcom/qpnp-qnovo5.c

+13 −0
Original line number Original line Diff line number Diff line
@@ -227,6 +227,19 @@ static int pt_dis_votable_cb(struct votable *votable, void *data, int disable, 
{

{

	struct qnovo *chip = data;

	struct qnovo *chip = data;

	int rc;

	int rc;

	u8 val = 0;



	if (!disable) {

		rc = qnovo5_write(chip, QNOVO_PHASE, &val, 1);

		if (rc < 0)

			dev_err(chip->dev, "Couldn't write to QNOVO_PHASE rc=%d\n",

				rc);



		rc = qnovo5_write(chip, QNOVO_P2_TICK, &val, 1);

		if (rc < 0)

			dev_err(chip->dev, "Couldn't write to QNOVO_P2_TICK rc=%d\n",

				rc);

	}





	rc = qnovo5_masked_write(chip, QNOVO_PE_CTRL, QNOVO_PTRAIN_EN_BIT,

	rc = qnovo5_masked_write(chip, QNOVO_PE_CTRL, QNOVO_PTRAIN_EN_BIT,

				 (bool)disable ? 0 : QNOVO_PTRAIN_EN_BIT);

				 (bool)disable ? 0 : QNOVO_PTRAIN_EN_BIT);