Commit 13e85822 authored Apr 25, 2018 by David Wang Committed by Thomas Gleixner May 06, 2018

x86/MCE: Enable MCE broadcasting on new Centaur CPUs



Newer Centaur multi-core CPUs also support MCE broadcasting to all
cores. Add a Centaur-specific init function setting that up.

 [ bp:
   - make mce_centaur_feature_init() static
   - flip check to do the f/m/s first for better readability
   - touch up text
  ]

Signed-off-by: David Wang <davidwang@zhaoxin.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: lukelin@viacpu.com
Cc: qiyuanwang@zhaoxin.com
Cc: Greg KH <greg@kroah.com>
Cc: brucechang@via-alliance.com
Cc: timguo@zhaoxin.com
Cc: cooperyan@zhaoxin.com
Cc: Tony Luck <tony.luck@intel.com>
Cc: benjaminpan@viatech.com
Cc: linux-edac <linux-edac@vger.kernel.org>
Link: http://lkml.kernel.org/r/1524652420-17330-2-git-send-email-davidwang@zhaoxin.com

parent ee946c36

arch/x86/kernel/cpu/mcheck/mce.c

+18 −0

Original line number	Diff line number	Diff line
		@@ -1727,6 +1727,21 @@ static void __mcheck_cpu_init_early(struct cpuinfo_x86 *c)
		}
		}

		static void mce_centaur_feature_init(struct cpuinfo_x86 *c)
		{
		struct mca_config *cfg = &mca_cfg;

		/*
		* All newer Centaur CPUs support MCE broadcasting. Enable
		* synchronization with a one second timeout.
		*/
		if ((c->x86 == 6 && c->x86_model == 0xf && c->x86_stepping >= 0xe) \|\|
		c->x86 > 6) {
		if (cfg->monarch_timeout < 0)
		cfg->monarch_timeout = USEC_PER_SEC;
		}
		}

		static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
		{
		switch (c->x86_vendor) {
		@@ -1739,6 +1754,9 @@ static void __mcheck_cpu_init_vendor(struct cpuinfo_x86 *c)
		mce_amd_feature_init(c);
		break;
		}
		case X86_VENDOR_CENTAUR:
		mce_centaur_feature_init(c);
		break;

		default:
		break;