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Commit 1371d3be authored by Vitaly Bordug's avatar Vitaly Bordug Committed by Dominik Brodowski
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[PATCH] 8xx PCMCIA: support for MPC885ADS and MPC866ADS 



This adds PCMCIA support for both MPC885ADS and MPC866ADS.

This is established not together with FADS, because 885 does not have
io_block_mapping() for BCSR area.
Also, some cleanups done both for 885ADS and MBX.

Signed-off-by: default avatarVitaly Bordug <vbordug@ru.mvista.com>
Signed-off-by: default avatarMarcelo Tosatti <marcelo.tosatti@cyclades.com>
Signed-off-by: default avatarDominik Brodowski <linux@dominikbrodowski.net>
parent a94515fa

drivers/pcmcia/m8xx_pcmcia.c

+91 −6
Original line number Diff line number Diff line
@@ -10,6 +10,9 @@ 
 * Further fixes, v2.6 kernel port

 *     <marcelo.tosatti@cyclades.com>

 * 

 * Some fixes, additions (C) 2005 Montavista Software, Inc. 

 *     <vbordug@ru.mvista.com>

 *

 * "The ExCA standard specifies that socket controllers should provide

 * two IO and five memory windows per socket, which can be independently

 * configured and positioned in the host address space and mapped to
@@ -97,6 +100,11 @@ MODULE_LICENSE("Dual MPL/GPL"); 
#endif

#endif



#if defined(CONFIG_MPC885ADS)

#define CONFIG_PCMCIA_SLOT_A

#define PCMCIA_GLITCHY_CD

#endif



/* Cyclades ACS uses both slots */

#ifdef CONFIG_PRxK

#define CONFIG_PCMCIA_SLOT_A
@@ -374,10 +382,10 @@ static int voltage_set(int slot, int vcc, int vpp) 
	}



	/* first, turn off all power */

	out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK));

	out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK));



	/* enable new powersettings */

	out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) | reg);

	out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) | reg);



	return 0;

}
@@ -386,12 +394,89 @@ static int voltage_set(int slot, int vcc, int vpp) 


static void hardware_enable(int slot)

{

	out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) & ~BCSR1_PCCEN);

	out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) & ~BCSR1_PCCEN);

}



static void hardware_disable(int slot)

{

	out_be32(&((u32 *)BCSR1), in_be32(&((u32 *)BCSR1)) |  BCSR1_PCCEN);

	out_be32((u32 *)BCSR1, in_be32((u32 *)BCSR1) |  BCSR1_PCCEN);

}



#endif



/* MPC885ADS Boards */



#if defined(CONFIG_MPC885ADS)



#define PCMCIA_BOARD_MSG "MPC885ADS"



static int voltage_set(int slot, int vcc, int vpp)

{

	u32 reg = 0;

	unsigned *bcsr_io;



	bcsr_io = ioremap(BCSR1, sizeof(unsigned long));



	switch(vcc) {

		case 0:

			break;

		case 33:

			reg |= BCSR1_PCCVCC0;

			break;

		case 50:

			reg |= BCSR1_PCCVCC1;

			break;

		default:

			return 1;

	}



	switch(vpp) {

		case 0:

			break;

		case 33:

		case 50:

			if(vcc == vpp)

				reg |= BCSR1_PCCVPP1;

			else

				return 1;

			break;

		case 120:

			if ((vcc == 33) || (vcc == 50))

				reg |= BCSR1_PCCVPP0;

			else

				return 1;

		default:

			return 1;

	}



	/* first, turn off all power */

	out_be32(bcsr_io, in_be32(bcsr_io) & ~(BCSR1_PCCVCC_MASK | BCSR1_PCCVPP_MASK));



	/* enable new powersettings */

	out_be32(bcsr_io, in_be32(bcsr_io) | reg);



	iounmap(bcsr_io);

	return 0;

}



#define socket_get(_slot_) PCMCIA_SOCKET_KEY_5V



static void hardware_enable(int slot)

{

	unsigned *bcsr_io;



	bcsr_io = ioremap(BCSR1, sizeof(unsigned long));

	out_be32(bcsr_io, in_be32(bcsr_io) & ~BCSR1_PCCEN);

	iounmap(bcsr_io);

}



static void hardware_disable(int slot)

{

	unsigned *bcsr_io;



	bcsr_io = ioremap(BCSR1, sizeof(unsigned long));

	out_be32(bcsr_io, in_be32(bcsr_io) |  BCSR1_PCCEN);

	iounmap(bcsr_io);

}



#endif
@@ -440,10 +525,10 @@ static int voltage_set(int slot, int vcc, int vpp) 
	}



	/* first, turn off all power */

	out_8(&((u8 *)MBX_CSR2_ADDR), in_8(&((u8 *)MBX_CSR2_ADDR)) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK));

	out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) & ~(CSR2_VCC_MASK | CSR2_VPP_MASK));



	/* enable new powersettings */

	out_8(&((u8 *)MBX_CSR2_ADDR), in_8(&((u8 *)MBX_CSR2_ADDR)) | reg);

	out_8((u8 *)MBX_CSR2_ADDR, in_8((u8 *)MBX_CSR2_ADDR) | reg);



	return 0;

}