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Commit 12f893da authored by qctecmdr Service's avatar qctecmdr Service Committed by Gerrit - the friendly Code Review server
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Merge "clk: qcom: dispcc: Add hardware control mode for MDP clock"

parents 6c13d8f4 8f926c73

drivers/clk/qcom/clk-rcg.h

+1 −0
Original line number Original line Diff line number Diff line
@@ -177,6 +177,7 @@ struct clk_rcg2 { 
	u8			flags;

	u8			flags;

#define FORCE_ENABLE_RCG	BIT(0)

#define FORCE_ENABLE_RCG	BIT(0)

#define DFS_ENABLE_RCG		BIT(1)

#define DFS_ENABLE_RCG		BIT(1)

#define HW_CLK_CTRL_MODE	BIT(2)

};

};





#define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr)

#define to_clk_rcg2(_hw) container_of(to_clk_regmap(_hw), struct clk_rcg2, clkr)

drivers/clk/qcom/clk-rcg2.c

+5 −0
Original line number Original line Diff line number Diff line
@@ -436,6 +436,8 @@ static int clk_rcg2_configure(struct clk_rcg2 *rcg, const struct freq_tbl *f) 
	cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT;

	cfg |= rcg->parent_map[index].cfg << CFG_SRC_SEL_SHIFT;

	if (rcg->mnd_width && f->n && (f->m != f->n))

	if (rcg->mnd_width && f->n && (f->m != f->n))

		cfg |= CFG_MODE_DUAL_EDGE;

		cfg |= CFG_MODE_DUAL_EDGE;

	if (rcg->flags & HW_CLK_CTRL_MODE)

		cfg |= CFG_HW_CLK_CTRL_MASK;

	ret = regmap_update_bits(rcg->clkr.regmap,

	ret = regmap_update_bits(rcg->clkr.regmap,

			rcg->cmd_rcgr + rcg->cfg_off + CFG_REG, mask, cfg);

			rcg->cmd_rcgr + rcg->cfg_off + CFG_REG, mask, cfg);

	if (ret)

	if (ret)
@@ -593,6 +595,9 @@ static int clk_rcg2_prepare(struct clk_hw *hw) 
	u32 cfg;

	u32 cfg;

	int ret;

	int ret;





	if (rcg->flags & HW_CLK_CTRL_MODE)

		return 0;



	ret = regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);

	ret = regmap_read(rcg->clkr.regmap, rcg->cmd_rcgr + CFG_REG, &cfg);

	if (ret)

	if (ret)

		return ret;

		return ret;

drivers/clk/qcom/dispcc-sm8150.c

+1 −0
Original line number Original line Diff line number Diff line
@@ -722,6 +722,7 @@ static struct clk_rcg2 disp_cc_mdss_mdp_clk_src = { 
	.parent_map = disp_cc_parent_map_5,

	.parent_map = disp_cc_parent_map_5,

	.freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src,

	.freq_tbl = ftbl_disp_cc_mdss_mdp_clk_src,

	.enable_safe_config = true,

	.enable_safe_config = true,

	.flags = HW_CLK_CTRL_MODE,

	.clkr.hw.init = &(struct clk_init_data){

	.clkr.hw.init = &(struct clk_init_data){

		.name = "disp_cc_mdss_mdp_clk_src",

		.name = "disp_cc_mdss_mdp_clk_src",

		.parent_names = disp_cc_parent_names_5,

		.parent_names = disp_cc_parent_names_5,