Loading Documentation/devicetree/bindings/clock/qcom,camcc.txt +2 −2 Original line number Diff line number Diff line Loading @@ -16,8 +16,8 @@ Example: compatible = "qcom,camcc-sm8150"; reg = <0xad00000 0x10000>; reg-names = "cc_base"; vdd_mx-supply = <&pm855l_s4_level>; vdd_mm-supply = <&pm855l_s5_level>; vdd_mx-supply = <&pm8150l_s4_level>; vdd_mm-supply = <&pm8150l_s5_level>; clock-names = "cfg_ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; #clock-cells = <1>; Loading Documentation/devicetree/bindings/clock/qcom,dispcc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -17,7 +17,7 @@ Example: compatible = "qcom,dispcc-sm8150"; reg = <0xaf00000 0x20000>; reg-names = "cc_base"; vdd_mm-supply = <&pm855l_s5_level>; vdd_mm-supply = <&pm8150l_s5_level>; clock-names = "cfg_ahb_clk"; clocks = <&clock_gcc GCC_DISP_AHB_CLK>; #clock-cells = <1>; Loading Documentation/devicetree/bindings/clock/qcom,gpucc.txt +2 −2 Original line number Diff line number Diff line Loading @@ -22,8 +22,8 @@ Example: compatible = "qcom,gpucc-sm8150"; reg = <0x2c90000 0x9000>; reg-names = "cc_base"; vdd_cx-supply = <&pm855l_s6_level>; vdd_mx-supply = <&pm855l_s4_level>; vdd_cx-supply = <&pm8150l_s6_level>; vdd_mx-supply = <&pm8150l_s4_level>; #clock-cells = <1>; #reset-cells = <1>; }; Documentation/devicetree/bindings/clock/qcom,npucc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ Example: compatible = "qcom,npucc-sm8150"; reg = <0x9910000 0x10000>; reg-names = "cc_base"; vdd_cx-supply = <&pm855l_s6_level>; vdd_cx-supply = <&pm8150l_s6_level>; vdd_gdsc-supply = <&npu_core_gdsc>; #clock-cells = <1>; #reset-cells = <1>; Loading Documentation/devicetree/bindings/clock/qcom,videocc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -15,7 +15,7 @@ Example: compatible = "qcom,videocc-sm8150"; reg = <0xab00000 0x10000>; reg-names = "cc_base"; vdd_mm-supply = <&pm855l_s5_level>; vdd_mm-supply = <&pm8150l_s5_level>; clock-names = "cfg_ahb_clk"; clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; #clock-cells = <1>; Loading Loading
Documentation/devicetree/bindings/clock/qcom,camcc.txt +2 −2 Original line number Diff line number Diff line Loading @@ -16,8 +16,8 @@ Example: compatible = "qcom,camcc-sm8150"; reg = <0xad00000 0x10000>; reg-names = "cc_base"; vdd_mx-supply = <&pm855l_s4_level>; vdd_mm-supply = <&pm855l_s5_level>; vdd_mx-supply = <&pm8150l_s4_level>; vdd_mm-supply = <&pm8150l_s5_level>; clock-names = "cfg_ahb_clk"; clocks = <&clock_gcc GCC_CAMERA_AHB_CLK>; #clock-cells = <1>; Loading
Documentation/devicetree/bindings/clock/qcom,dispcc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -17,7 +17,7 @@ Example: compatible = "qcom,dispcc-sm8150"; reg = <0xaf00000 0x20000>; reg-names = "cc_base"; vdd_mm-supply = <&pm855l_s5_level>; vdd_mm-supply = <&pm8150l_s5_level>; clock-names = "cfg_ahb_clk"; clocks = <&clock_gcc GCC_DISP_AHB_CLK>; #clock-cells = <1>; Loading
Documentation/devicetree/bindings/clock/qcom,gpucc.txt +2 −2 Original line number Diff line number Diff line Loading @@ -22,8 +22,8 @@ Example: compatible = "qcom,gpucc-sm8150"; reg = <0x2c90000 0x9000>; reg-names = "cc_base"; vdd_cx-supply = <&pm855l_s6_level>; vdd_mx-supply = <&pm855l_s4_level>; vdd_cx-supply = <&pm8150l_s6_level>; vdd_mx-supply = <&pm8150l_s4_level>; #clock-cells = <1>; #reset-cells = <1>; };
Documentation/devicetree/bindings/clock/qcom,npucc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -18,7 +18,7 @@ Example: compatible = "qcom,npucc-sm8150"; reg = <0x9910000 0x10000>; reg-names = "cc_base"; vdd_cx-supply = <&pm855l_s6_level>; vdd_cx-supply = <&pm8150l_s6_level>; vdd_gdsc-supply = <&npu_core_gdsc>; #clock-cells = <1>; #reset-cells = <1>; Loading
Documentation/devicetree/bindings/clock/qcom,videocc.txt +1 −1 Original line number Diff line number Diff line Loading @@ -15,7 +15,7 @@ Example: compatible = "qcom,videocc-sm8150"; reg = <0xab00000 0x10000>; reg-names = "cc_base"; vdd_mm-supply = <&pm855l_s5_level>; vdd_mm-supply = <&pm8150l_s5_level>; clock-names = "cfg_ahb_clk"; clocks = <&clock_gcc GCC_VIDEO_AHB_CLK>; #clock-cells = <1>; Loading