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Commit 1038392b authored by Ville Syrjälä's avatar Ville Syrjälä Committed by Daniel Vetter
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drm/i915: Disable trickle feed for gen2/3 



My 830 is unhappy with trickle feed enabled. The symptom is that
the image on the screen shifts a bit to right occasionally.

The BIOS initially disables trickle feed, but it gets reset during
suspend, so we need to re-disable it ourselves. Juse disable it
always.

Also disable it for all other gen2/3 platforms since we disable it
for all more recent platforms as well (until HSW that is). At least
my 855 doesn't seem to mind us doing this. I don't have gen3
hardware to test that.

Signed-off-by: default avatarVille Syrjälä <ville.syrjala@linux.intel.com>
Signed-off-by: default avatarDaniel Vetter <daniel.vetter@ffwll.ch>
parent 9d539105

drivers/gpu/drm/i915/i915_reg.h

+4 −0
Original line number Diff line number Diff line
@@ -1272,6 +1272,10 @@ enum punit_power_well { 
#define   INSTPM_TLB_INVALIDATE	(1<<9)

#define   INSTPM_SYNC_FLUSH	(1<<5)

#define ACTHD	        0x020c8

#define MEM_MODE	0x020cc

#define   MEM_DISPLAY_B_TRICKLE_FEED_DISABLE (1<<3) /* 830 only */

#define   MEM_DISPLAY_A_TRICKLE_FEED_DISABLE (1<<2) /* 830/845 only */

#define   MEM_DISPLAY_TRICKLE_FEED_DISABLE (1<<2) /* 85x only */

#define FW_BLC		0x020d8

#define FW_BLC2		0x020dc

#define FW_BLC_SELF	0x020e0 /* 915+ only */

drivers/gpu/drm/i915/intel_pm.c

+10 −0
Original line number Diff line number Diff line
@@ -6138,6 +6138,9 @@ static void gen3_init_clock_gating(struct drm_device *dev) 


	/* On GEN3 we really need to make sure the ARB C3 LP bit is set */

	I915_WRITE(MI_ARB_STATE, _MASKED_BIT_ENABLE(MI_ARB_C3_LP_WRITE_ENABLE));



	I915_WRITE(MI_ARB_STATE,

		   _MASKED_BIT_ENABLE(MI_ARB_DISPLAY_TRICKLE_FEED_DISABLE));

}



static void i85x_init_clock_gating(struct drm_device *dev)
@@ -6149,6 +6152,9 @@ static void i85x_init_clock_gating(struct drm_device *dev) 
	/* interrupts should cause a wake up from C3 */

	I915_WRITE(MI_STATE, _MASKED_BIT_ENABLE(MI_AGPBUSY_INT_EN) |

		   _MASKED_BIT_DISABLE(MI_AGPBUSY_830_MODE));



	I915_WRITE(MEM_MODE,

		   _MASKED_BIT_ENABLE(MEM_DISPLAY_TRICKLE_FEED_DISABLE));

}



static void i830_init_clock_gating(struct drm_device *dev)
@@ -6156,6 +6162,10 @@ static void i830_init_clock_gating(struct drm_device *dev) 
	struct drm_i915_private *dev_priv = dev->dev_private;



	I915_WRITE(DSPCLK_GATE_D, OVRUNIT_CLOCK_GATE_DISABLE);



	I915_WRITE(MEM_MODE,

		   _MASKED_BIT_ENABLE(MEM_DISPLAY_A_TRICKLE_FEED_DISABLE) |

		   _MASKED_BIT_ENABLE(MEM_DISPLAY_B_TRICKLE_FEED_DISABLE));

}



void intel_init_clock_gating(struct drm_device *dev)