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Commit 0fb7620f authored by Masanari Iida's avatar Masanari Iida Committed by Mark Brown
Browse files

spi: Fix typo in devicetree/bindings/spi 



This patch fix spelling typos found in
Documentation/devicetree/bingings/spi.

Signed-off-by: default avatarMasanari Iida <standby24x7@gmail.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 1a695a90

Documentation/devicetree/bindings/spi/spi-davinci.txt

+1 −1
Original line number Diff line number Diff line
@@ -21,7 +21,7 @@ Required properties: 
	IP to the interrupt controller within the SoC. Possible values

	are 0 and 1. Manual says one of the two possible interrupt

	lines can be tied to the interrupt controller. Set this

	based on a specifc SoC configuration.

	based on a specific SoC configuration.

- interrupts: interrupt number mapped to CPU.

- clocks: spi clk phandle

Documentation/devicetree/bindings/spi/ti_qspi.txt

+1 −1
Original line number Diff line number Diff line
@@ -20,7 +20,7 @@ Optional properties: 
		      chipselect register and offset of that register.



NOTE: TI QSPI controller requires different pinmux and IODelay

paramaters for Mode-0 and Mode-3 operations, which needs to be set up by

parameters for Mode-0 and Mode-3 operations, which needs to be set up by

the bootloader (U-Boot). Default configuration only supports Mode-0

operation. Hence, "spi-cpol" and "spi-cpha" DT properties cannot be

specified in the slave nodes of TI QSPI controller without appropriate