Commit 0f3b8ff6 authored Dec 20, 2019 by Blagovest Kolenichev

Merge android-4.14-q.151 (93b27559) into msm-4.14



* refs/heads/tmp-93b27559:
  Linux 4.14.151
  RDMA/cxgb4: Do not dma memory off of the stack
  kvm: vmx: Basic APIC virtualization controls have three settings
  kvm: apic: Flush TLB after APIC mode/address change if VPIDs are in use
  kvm: vmx: Introduce lapic_mode enumeration
  KVM: X86: introduce invalidate_gpa argument to tlb flush
  PCI: PM: Fix pci_power_up()
  xen/netback: fix error path of xenvif_connect_data()
  cpufreq: Avoid cpufreq_suspend() deadlock on system shutdown
  memstick: jmb38x_ms: Fix an error handling path in 'jmb38x_ms_probe()'
  btrfs: block-group: Fix a memory leak due to missing btrfs_put_block_group()
  pinctrl: armada-37xx: swap polarity on LED group
  pinctrl: armada-37xx: fix control of pins 32 and up
  x86/boot/64: Make level2_kernel_pgt pages invalid outside kernel area
  CIFS: avoid using MID 0xFFFF
  parisc: Fix vmap memory leak in ioremap()/iounmap()
  xtensa: drop EXPORT_SYMBOL for outs*/ins*
  hugetlbfs: don't access uninitialized memmaps in pfn_range_valid_gigantic()
  mm/page_owner: don't access uninitialized memmaps when reading /proc/pagetypeinfo
  mm/slub: fix a deadlock in show_slab_objects()
  scsi: zfcp: fix reaction on bit error threshold notification
  fs/proc/page.c: don't access uninitialized memmaps in fs/proc/page.c
  drivers/base/memory.c: don't access uninitialized memmaps in soft_offline_page_store()
  drm/amdgpu: Bail earlier when amdgpu.cik_/si_support is not set to 1
  drm/edid: Add 6 bpc quirk for SDC panel in Lenovo G50
  mac80211: Reject malformed SSID elements
  cfg80211: wext: avoid copying malformed SSIDs
  ASoC: rsnd: Reinitialize bit clock inversion flag for every format setting
  Input: synaptics-rmi4 - avoid processing unknown IRQs
  Input: da9063 - fix capability and drop KEY_SLEEP
  scsi: ch: Make it possible to open a ch device multiple times again
  scsi: core: try to get module before removing device
  scsi: core: save/restore command resid for error handling
  scsi: sd: Ignore a failure to sync cache due to lack of authorization
  staging: wlan-ng: fix exit return when sme->key_idx >= NUM_WEPKEYS
  MIPS: tlbex: Fix build_restore_pagemask KScratch restore
  arm64/speculation: Support 'mitigations=' cmdline option
  arm64: Use firmware to detect CPUs that are not affected by Spectre-v2
  arm64: Force SSBS on context switch
  arm64: ssbs: Don't treat CPUs with SSBS as unaffected by SSB
  arm64: add sysfs vulnerability show for speculative store bypass
  arm64: add sysfs vulnerability show for spectre-v2
  arm64: Always enable spectre-v2 vulnerability detection
  arm64: Advertise mitigation of Spectre-v2, or lack thereof
  arm64: Provide a command line to disable spectre_v2 mitigation
  arm64: Always enable ssb vulnerability detection
  arm64: enable generic CPU vulnerabilites support
  arm64: add sysfs vulnerability show for meltdown
  arm64: Add sysfs vulnerability show for spectre-v1
  arm64: fix SSBS sanitization
  KVM: arm64: Set SCTLR_EL2.DSSBS if SSBD is forcefully disabled and !vhe
  arm64: ssbd: Add support for PSTATE.SSBS rather than trapping to EL3
  arm64: cpufeature: Detect SSBS and advertise to userspace
  arm64: Get rid of __smccc_workaround_1_hvc_*
  arm64: don't zero DIT on signal return
  arm64: KVM: Use SMCCC_ARCH_WORKAROUND_1 for Falkor BP hardening
  arm64: capabilities: Add support for checks based on a list of MIDRs
  arm64: Add MIDR encoding for Arm Cortex-A55 and Cortex-A35
  arm64: Add helpers for checking CPU MIDR against a range
  arm64: capabilities: Clean up midr range helpers
  arm64: capabilities: Change scope of VHE to Boot CPU feature
  arm64: capabilities: Add support for features enabled early
  arm64: capabilities: Restrict KPTI detection to boot-time CPUs
  arm64: capabilities: Introduce weak features based on local CPU
  arm64: capabilities: Group handling of features and errata workarounds
  arm64: capabilities: Allow features based on local CPU scope
  arm64: capabilities: Split the processing of errata work arounds
  arm64: capabilities: Prepare for grouping features and errata work arounds
  arm64: capabilities: Filter the entries based on a given mask
  arm64: capabilities: Unify the verification
  arm64: capabilities: Add flags to handle the conflicts on late CPU
  arm64: capabilities: Prepare for fine grained capabilities
  arm64: capabilities: Move errata processing code
  arm64: capabilities: Move errata work around check on boot CPU
  arm64: capabilities: Update prototype for enable call back
  arm64: Introduce sysreg_clear_set()
  arm64: add PSR_AA32_* definitions
  arm64: move SCTLR_EL{1,2} assertions to <asm/sysreg.h>
  arm64: Expose Arm v8.4 features
  arm64: Documentation: cpu-feature-registers: Remove RES0 fields
  arm64: v8.4: Support for new floating point multiplication instructions
  arm64: Fix the feature type for ID register fields
  arm64: Expose support for optional ARMv8-A features
  arm64: sysreg: Move to use definitions for all the SCTLR bits
  USB: ldusb: fix read info leaks
  USB: usblp: fix use-after-free on disconnect
  USB: ldusb: fix memleak on disconnect
  USB: serial: ti_usb_3410_5052: fix port-close races
  usb: udc: lpc32xx: fix bad bit shift operation
  ALSA: hda/realtek - Add support for ALC711
  USB: legousbtower: fix memleak on disconnect
  memfd: Fix locking when tagging pins
  loop: Add LOOP_SET_DIRECT_IO to compat ioctl
  net: avoid potential infinite loop in tc_ctl_action()
  sctp: change sctp_prot .no_autobind with true
  net: stmmac: disable/enable ptp_ref_clk in suspend/resume flow
  net: i82596: fix dma_alloc_attr for sni_82596
  net: bcmgenet: Set phydev->dev_flags only for internal PHYs
  net: bcmgenet: Fix RGMII_MODE_EN value for GENET v1/2/3
  ipv4: Return -ENETUNREACH if we can't create route but saddr is valid
  ocfs2: fix panic due to ocfs2_wq is null
  Revert "drm/radeon: Fix EEH during kexec"
  md/raid0: fix warning message for parameter default_layout
  namespace: fix namespace.pl script to support relative paths
  r8152: Set macpassthru in reset_resume callback
  net: hisilicon: Fix usage of uninitialized variable in function mdio_sc_cfg_reg_write()
  mips: Loongson: Fix the link time qualifier of 'serial_exit()'
  mac80211: fix txq null pointer dereference
  nl80211: fix null pointer dereference
  xen/efi: Set nonblocking callbacks
  MIPS: dts: ar9331: fix interrupt-controller size
  net: dsa: qca8k: Use up to 7 ports for all operations
  ARM: dts: am4372: Set memory bandwidth limit for DISPC
  ieee802154: ca8210: prevent memory leak
  ARM: OMAP2+: Fix missing reset done flag for am3 and am43
  scsi: qla2xxx: Fix unbound sleep in fcport delete path.
  scsi: megaraid: disable device when probe failed after enabled device
  scsi: ufs: skip shutdown if hba is not powered
  rtlwifi: Fix potential overflow on P2P code
  ANDROID: clang: update to 9.0.8 based on r365631c
  ANDROID: move up spin_unlock_bh() ahead of remove_proc_entry()
  ANDROID: refactor build.config files to remove duplication

Conflicts:
	arch/arm64/include/asm/cpucaps.h
	arch/arm64/include/asm/cputype.h
	arch/arm64/include/asm/processor.h
	arch/arm64/include/asm/ptrace.h
	arch/arm64/include/asm/sysreg.h
	arch/arm64/include/uapi/asm/hwcap.h
	arch/arm64/kernel/cpu_errata.c
	arch/arm64/kernel/cpufeature.c
	arch/arm64/kernel/ssbd.c

Change-Id: Ia6d7b060214022efcb061ea4029bb583e4a68aa2
Signed-off-by: Blagovest Kolenichev <bkolenichev@codeaurora.org>

parents 92760fd0 93b27559

Documentation/admin-guide/kernel-parameters.txt

+9 −7

Original line number	Diff line number	Diff line
		@@ -2402,8 +2402,8 @@
		http://repo.or.cz/w/linux-2.6/mini2440.git

		mitigations=
		[X86,PPC,S390] Control optional mitigations for CPU
		vulnerabilities. This is a set of curated,
		[X86,PPC,S390,ARM64] Control optional mitigations for
		CPU vulnerabilities. This is a set of curated,
		arch-independent options, each of which is an
		aggregation of existing arch-specific options.

		@@ -2412,12 +2412,14 @@
		improves system performance, but it may also
		expose users to several CPU vulnerabilities.
		Equivalent to: nopti [X86,PPC]
		kpti=0 [ARM64]
		nospectre_v1 [PPC]
		nobp=0 [S390]
		nospectre_v1 [X86]
		nospectre_v2 [X86,PPC,S390]
		nospectre_v2 [X86,PPC,S390,ARM64]
		spectre_v2_user=off [X86]
		spec_store_bypass_disable=off [X86,PPC]
		ssbd=force-off [ARM64]
		l1tf=off [X86]
		mds=off [X86]

		@@ -2758,10 +2760,10 @@
		(bounds check bypass). With this option data leaks
		are possible in the system.

		nospectre_v2 [X86,PPC_FSL_BOOK3E] Disable all mitigations for the Spectre variant 2
		(indirect branch prediction) vulnerability. System may
		allow data leaks with this option, which is equivalent
		to spectre_v2=off.
		nospectre_v2 [X86,PPC_FSL_BOOK3E,ARM64] Disable all mitigations for
		the Spectre variant 2 (indirect branch prediction)
		vulnerability. System may allow data leaks with this
		option.

		nospec_store_bypass_disable
		[HW] Disable all mitigations for the Speculative Store Bypass vulnerability

Documentation/arm64/cpu-feature-registers.txt

+14 −3

Original line number	Diff line number	Diff line
		@@ -111,6 +111,9 @@ infrastructure:
		\| Name \| bits \| visible \|
		\|--------------------------------------------------\|
		\| RES0 \| [63-48] \| n \|
		\| TS \| [55-52] \| y \|
		\|--------------------------------------------------\|
		\| FHM \| [51-48] \| y \|
		\|--------------------------------------------------\|
		\| DP \| [47-44] \| y \|
		\|--------------------------------------------------\|
		@@ -133,8 +136,6 @@ infrastructure:
		\| SHA1 \| [11-8] \| y \|
		\|--------------------------------------------------\|
		\| AES \| [7-4] \| y \|
		\|--------------------------------------------------\|
		\| RES0 \| [3-0] \| n \|
		x--------------------------------------------------x


		@@ -142,7 +143,9 @@ infrastructure:
		x--------------------------------------------------x
		\| Name \| bits \| visible \|
		\|--------------------------------------------------\|
		\| RES0 \| [63-28] \| n \|
		\| DIT \| [51-48] \| y \|
		\|--------------------------------------------------\|
		\| SVE \| [35-32] \| y \|
		\|--------------------------------------------------\|
		\| GIC \| [27-24] \| n \|
		\|--------------------------------------------------\|
		@@ -193,6 +196,14 @@ infrastructure:
		\| DPB \| [3-0] \| y \|
		x--------------------------------------------------x

		5) ID_AA64MMFR2_EL1 - Memory model feature register 2

		x--------------------------------------------------x
		\| Name \| bits \| visible \|
		\|--------------------------------------------------\|
		\| AT \| [35-32] \| y \|
		x--------------------------------------------------x

		Appendix I: Example
		---------------------------

Makefile

+1 −1

Original line number	Diff line number	Diff line
		# SPDX-License-Identifier: GPL-2.0
		VERSION = 4
		PATCHLEVEL = 14
		SUBLEVEL = 150
		SUBLEVEL = 151
		EXTRAVERSION =
		NAME = Petit Gorille

arch/arm/boot/dts/am4372.dtsi

+2 −0

Original line number	Diff line number	Diff line
		@@ -1118,6 +1118,8 @@
		ti,hwmods = "dss_dispc";
		clocks = <&disp_clk>;
		clock-names = "fck";

		max-memory-bandwidth = <230000000>;
		};

		rfbi: rfbi@4832a800 {

arch/arm/mach-omap2/omap_hwmod_33xx_43xx_ipblock_data.c

+2 −1

Original line number	Diff line number	Diff line
		@@ -966,7 +966,8 @@ static struct omap_hwmod_class_sysconfig am33xx_timer_sysc = {
		.rev_offs = 0x0000,
		.sysc_offs = 0x0010,
		.syss_offs = 0x0014,
		.sysc_flags = (SYSC_HAS_SIDLEMODE \| SYSC_HAS_SOFTRESET),
		.sysc_flags = SYSC_HAS_SIDLEMODE \| SYSC_HAS_SOFTRESET \|
		SYSC_HAS_RESET_STATUS,
		.idlemodes = (SIDLE_FORCE \| SIDLE_NO \| SIDLE_SMART \|
		SIDLE_SMART_WKUP),
		.sysc_fields = &omap_hwmod_sysc_type2,

Original line number	Diff line number	Diff line
		@@ -111,6 +111,9 @@ infrastructure:
		\| Name \| bits \| visible \|
		\|--------------------------------------------------\|
		\| RES0 \| [63-48] \| n \|
		\| TS \| [55-52] \| y \|
		\|--------------------------------------------------\|
		\| FHM \| [51-48] \| y \|
		\|--------------------------------------------------\|
		\| DP \| [47-44] \| y \|
		\|--------------------------------------------------\|
		@@ -133,8 +136,6 @@ infrastructure:
		\| SHA1 \| [11-8] \| y \|
		\|--------------------------------------------------\|
		\| AES \| [7-4] \| y \|
		\|--------------------------------------------------\|
		\| RES0 \| [3-0] \| n \|
		x--------------------------------------------------x


		@@ -142,7 +143,9 @@ infrastructure:
		x--------------------------------------------------x
		\| Name \| bits \| visible \|
		\|--------------------------------------------------\|
		\| RES0 \| [63-28] \| n \|
		\| DIT \| [51-48] \| y \|
		\|--------------------------------------------------\|
		\| SVE \| [35-32] \| y \|
		\|--------------------------------------------------\|
		\| GIC \| [27-24] \| n \|
		\|--------------------------------------------------\|
		@@ -193,6 +196,14 @@ infrastructure:
		\| DPB \| [3-0] \| y \|
		x--------------------------------------------------x

		5) ID_AA64MMFR2_EL1 - Memory model feature register 2

		x--------------------------------------------------x
		\| Name \| bits \| visible \|
		\|--------------------------------------------------\|
		\| AT \| [35-32] \| y \|
		x--------------------------------------------------x

		Appendix I: Example
		---------------------------