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Commit 0e6ef184 authored by Paul Cercueil's avatar Paul Cercueil Committed by Greg Kroah-Hartman
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MIPS: lb60: Fix pin mappings



commit 1323c3b72a987de57141cabc44bf9cd83656bc70 upstream.

The pin mappings introduced in commit 636f8ba6
("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers")
are completely wrong. The pinctrl driver name is incorrect, and the
function and group fields are swapped.

Fixes: 636f8ba6 ("MIPS: JZ4740: Qi LB60: Add pinctrl configuration for several drivers")
Cc: <stable@vger.kernel.org>
Signed-off-by: default avatarPaul Cercueil <paul@crapouillou.net>
Reviewed-by: default avatarLinus Walleij <linus.walleij@linaro.org>
Signed-off-by: default avatarPaul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: od@zcrc.me
Cc: linux-mips@vger.kernel.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: default avatarGreg Kroah-Hartman <gregkh@linuxfoundation.org>
parent dd5994ab
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+8 −8
Original line number Diff line number Diff line
@@ -471,27 +471,27 @@ static unsigned long pin_cfg_bias_disable[] = {
static struct pinctrl_map pin_map[] __initdata = {
	/* NAND pin configuration */
	PIN_MAP_MUX_GROUP_DEFAULT("jz4740-nand",
			"10010000.jz4740-pinctrl", "nand", "nand-cs1"),
			"10010000.pin-controller", "nand-cs1", "nand"),

	/* fbdev pin configuration */
	PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_DEFAULT,
			"10010000.jz4740-pinctrl", "lcd", "lcd-8bit"),
			"10010000.pin-controller", "lcd-8bit", "lcd"),
	PIN_MAP_MUX_GROUP("jz4740-fb", PINCTRL_STATE_SLEEP,
			"10010000.jz4740-pinctrl", "lcd", "lcd-no-pins"),
			"10010000.pin-controller", "lcd-no-pins", "lcd"),

	/* MMC pin configuration */
	PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
			"10010000.jz4740-pinctrl", "mmc", "mmc-1bit"),
			"10010000.pin-controller", "mmc-1bit", "mmc"),
	PIN_MAP_MUX_GROUP_DEFAULT("jz4740-mmc.0",
			"10010000.jz4740-pinctrl", "mmc", "mmc-4bit"),
			"10010000.pin-controller", "mmc-4bit", "mmc"),
	PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
			"10010000.jz4740-pinctrl", "PD0", pin_cfg_bias_disable),
			"10010000.pin-controller", "PD0", pin_cfg_bias_disable),
	PIN_MAP_CONFIGS_PIN_DEFAULT("jz4740-mmc.0",
			"10010000.jz4740-pinctrl", "PD2", pin_cfg_bias_disable),
			"10010000.pin-controller", "PD2", pin_cfg_bias_disable),

	/* PWM pin configuration */
	PIN_MAP_MUX_GROUP_DEFAULT("jz4740-pwm",
			"10010000.jz4740-pinctrl", "pwm4", "pwm4"),
			"10010000.pin-controller", "pwm4", "pwm4"),
};