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Commit 0dc48495 authored by Olof Johansson's avatar Olof Johansson
Browse files

Merge tag 'renesas-dt-for-v3.20' of... 

Merge tag 'renesas-dt-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/dt

Merge "Renesas ARM Based SoC DT Updates for v3.20" from Simon Horman:

* Use clock-indices instead of deprecated renesas,clock-indices
* Prepare for r8a73a4 multiplatform support
* Increase clock coverage for r8a779[014]
* Correct r8a7779 clock usage
* Correct LAN9220 VDDVARIO voltage on ape6evm
* Correct QSPI SPI-Flash mode of lager and koelsch
* Correct flash partition label and size on koelsch
* Correct mask for GIC PPI interrupts on r8a779[14]
* Correct BSC bus range on ape6evm-reference

* tag 'renesas-dt-for-v3.20' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas

: (30 commits)
  ARM: shmobile: r8a7791: add MLB+ clock
  ARM: shmobile: r8a7790: add MLB+ clock
  ARM: shmobile: ape6evm: Fix LAN9220 VDDVARIO voltage
  ARM: shmobile: r8a73a4: Add r8a73a4-ape6evm.dtb to ARCH_SHMOBILE_MULTI
  ARM: shmobile: ape6evm: Add keypad to the device tree
  ARM: shmobile: ape6evm: Add LEDs to the device tree
  ARM: shmobile: ape6evm: synchronize dts with reference platform
  ARM: shmobile: ape6evm: fix compatible string for Ethernet controller
  ARM: shmobile: r8a7794: Add MMCIF clock to device tree
  ARM: shmobile: r8a7794: Add SDHI clocks to device tree
  ARM: shmobile: r8a7794: Add I2C clocks to device tree
  ARM: shmobile: r8a7779: Add TWD device to DTS
  ARM: shmobile: r8a7779: Use MSTP for SCIF clocks
  ARM: shmobile: r8a7779: Use R8A7779_CLK_P as SCIF parent clock
  ARM: shmobile: r8a7794: Add QSPI clock to device tree
  ARM: shmobile: lager: Fix QSPI mode of SPI-Flash into mode3
  ARM: shmobile: r8a7794: Add SYS-DMAC clocks to device tree
  ARM: shmobile: r8a7791: Add IPMMU-SGX clock to device tree
  ARM: shmobile: koelsch: Fix QSPI mode of SPI-Flash into mode3
  ARM: shmobile: r8a7794: Add USBDMAC[01] clocks to device tree
  ...

Signed-off-by: default avatarOlof Johansson <olof@lixom.net>
parents 318a68f2 7408d306

arch/arm/boot/dts/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -416,6 +416,7 @@ dtb-$(CONFIG_ARCH_SHMOBILE_LEGACY) += \ 
	sh73a0-kzm9g-reference.dtb

dtb-$(CONFIG_ARCH_SHMOBILE_MULTI) += emev2-kzm9d.dtb \

	r7s72100-genmai.dtb \

	r8a73a4-ape6evm.dtb \

	r8a7740-armadillo800eva.dtb \

	r8a7779-marzen.dtb \

	r8a7790-lager.dtb \

arch/arm/boot/dts/r8a73a4-ape6evm-reference.dts

+1 −1
Original line number Diff line number Diff line
@@ -67,7 +67,7 @@ 
		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0 0 0x80000000>;

		ranges = <0 0 0 0x20000000>;

	};

};

arch/arm/boot/dts/r8a73a4-ape6evm.dts

+169 −4
Original line number Diff line number Diff line
@@ -10,14 +10,20 @@ 


/dts-v1/;

#include "r8a73a4.dtsi"

#include <dt-bindings/interrupt-controller/irq.h>

#include <dt-bindings/gpio/gpio.h>

#include <dt-bindings/input/input.h>



/ {

	model = "APE6EVM";

	compatible = "renesas,ape6evm", "renesas,r8a73a4";



	aliases {

		serial0 = &scifa0;

	};



	chosen {

		bootargs = "console=ttySC0,115200 ignore_loglevel root=/dev/nfs ip=dhcp rw";

		stdout-path = &scifa0;

	};



	memory@40000000 {
@@ -30,7 +36,35 @@ 
		reg = <2 0x00000000 0 0x40000000>;

	};



	ape6evm_fixed_3v3: fixedregulator@0 {

	vcc_mmc0: regulator@0 {

		compatible = "regulator-fixed";

		regulator-name = "MMC0 Vcc";

		regulator-min-microvolt = <2800000>;

		regulator-max-microvolt = <2800000>;

		regulator-always-on;

	};



	vcc_sdhi0: regulator@1 {

		compatible = "regulator-fixed";



		regulator-name = "SDHI0 Vcc";

		regulator-min-microvolt = <3300000>;

		regulator-max-microvolt = <3300000>;



		gpio = <&pfc 76 GPIO_ACTIVE_HIGH>;

		enable-active-high;

	};



	/* Common 1.8V and 3.3V rails, used by several devices on APE6EVM */

	ape6evm_fixed_1v8: regulator@2 {

		compatible = "regulator-fixed";

		regulator-name = "1V8";

		regulator-min-microvolt = <1800000>;

		regulator-max-microvolt = <1800000>;

		regulator-always-on;

	};



	ape6evm_fixed_3v3: regulator@3 {

		compatible = "regulator-fixed";

		regulator-name = "3V3";

		regulator-min-microvolt = <3300000>;
@@ -39,11 +73,13 @@ 
	};



	lbsc {

		compatible = "simple-bus";

		#address-cells = <1>;

		#size-cells = <1>;

		ranges = <0 0 0 0x20000000>;



		ethernet@8000000 {

			compatible = "smsc,lan9118", "smsc,lan9115";

			compatible = "smsc,lan9220", "smsc,lan9115";

			reg = <0x08000000 0x1000>;

			interrupt-parent = <&irqc1>;

			interrupts = <8 IRQ_TYPE_LEVEL_HIGH>;
@@ -52,7 +88,75 @@ 
			smsc,irq-active-high;

			smsc,irq-push-pull;

			vdd33a-supply = <&ape6evm_fixed_3v3>;

			vddvario-supply = <&ape6evm_fixed_3v3>;

			vddvario-supply = <&ape6evm_fixed_1v8>;

		};

	};



	leds {

		compatible = "gpio-leds";

		led1 {

			gpios = <&pfc 28 GPIO_ACTIVE_LOW>;

			label = "GNSS_EN";

		};

		led2 {

			gpios = <&pfc 126 GPIO_ACTIVE_LOW>;

			label = "NFC_NRST";

		};

		led3 {

			gpios = <&pfc 132 GPIO_ACTIVE_LOW>;

			label = "GNSS_NRST";

		};

		led4 {

			gpios = <&pfc 232 GPIO_ACTIVE_LOW>;

			label = "BT_WAKEUP";

		};

		led5 {

			gpios = <&pfc 250 GPIO_ACTIVE_LOW>;

			label = "STROBE";

		};

		led6 {

			gpios = <&pfc 288 GPIO_ACTIVE_LOW>;

			label = "BBRESETOUT";

		};

	};



	keyboard {

		compatible = "gpio-keys";



		zero-key {

			gpios = <&pfc 324 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_0>;

			label = "S16";

		};



		menu-key {

			gpios = <&pfc 325 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_MENU>;

			label = "S17";

		};



		home-key {

			gpios = <&pfc 326 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_HOME>;

			label = "S18";

		};



		back-key {

			gpios = <&pfc 327 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_BACK>;

			label = "S19";

		};



		volup-key {

			gpios = <&pfc 328 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_VOLUMEUP>;

			label = "S20";

		};



		voldown-key {

			gpios = <&pfc 329 GPIO_ACTIVE_LOW>;

			linux,code = <KEY_VOLUMEDOWN>;

			label = "S21";

		};

	};

};
@@ -79,3 +183,64 @@ 
	>;

	voltage-tolerance = <1>; /* 1% */

};



&cmt1 {

	status = "okay";

};



&pfc {

	scifa0_pins: serial0 {

		renesas,groups = "scifa0_data";

		renesas,function = "scifa0";

	};



	mmc0_pins: mmc {

		renesas,groups = "mmc0_data8", "mmc0_ctrl";

		renesas,function = "mmc0";

	};



	sdhi0_pins: sd0 {

		renesas,groups = "sdhi0_data4", "sdhi0_ctrl", "sdhi0_cd";

		renesas,function = "sdhi0";

	};



	sdhi1_pins: sd1 {

		renesas,groups = "sdhi1_data4", "sdhi1_ctrl";

		renesas,function = "sdhi1";

	};

};



&mmcif0 {

	vmmc-supply = <&vcc_mmc0>;

	bus-width = <8>;

	non-removable;

	pinctrl-names = "default";

	pinctrl-0 = <&mmc0_pins>;

	status = "okay";

};



&scifa0 {

	pinctrl-0 = <&scifa0_pins>;

	pinctrl-names = "default";



	status = "okay";

};



&sdhi0 {

	vmmc-supply = <&vcc_sdhi0>;

	bus-width = <4>;

	toshiba,mmc-wrprotect-disable;

	pinctrl-names = "default";

	pinctrl-0 = <&sdhi0_pins>;

	status = "okay";

};



&sdhi1 {

	vmmc-supply = <&ape6evm_fixed_3v3>;

	bus-width = <4>;

	broken-cd;

	toshiba,mmc-wrprotect-disable;

	pinctrl-names = "default";

	pinctrl-0 = <&sdhi1_pins>;

	status = "okay";

};

arch/arm/boot/dts/r8a7740.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -453,7 +453,7 @@ 
			reg = <0xe6150080 4>;

			clocks = <&sub_clk>, <&sub_clk>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			clock-indices = <

				R8A7740_CLK_SUBCK R8A7740_CLK_SUBCK2

			>;

			clock-output-names =
@@ -468,7 +468,7 @@ 
				 <&cpg_clocks R8A7740_CLK_HPP>, <&sub_clk>,

				 <&cpg_clocks R8A7740_CLK_B>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			clock-indices = <

				R8A7740_CLK_CEU21 R8A7740_CLK_CEU20 R8A7740_CLK_TMU0

				R8A7740_CLK_LCDC1 R8A7740_CLK_IIC0 R8A7740_CLK_TMU1

				R8A7740_CLK_LCDC0
@@ -489,7 +489,7 @@ 
				 <&sub_clk>, <&sub_clk>, <&sub_clk>,

				 <&sub_clk>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			clock-indices = <

				R8A7740_CLK_SCIFA6 R8A7740_CLK_INTCA

				R8A7740_CLK_SCIFA7

				R8A7740_CLK_DMAC1 R8A7740_CLK_DMAC2
@@ -518,7 +518,7 @@ 
				 <&cpg_clocks R8A7740_CLK_HP>,

				 <&cpg_clocks R8A7740_CLK_HP>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			clock-indices = <

				R8A7740_CLK_CMT1 R8A7740_CLK_FSI R8A7740_CLK_IIC1

				R8A7740_CLK_USBF R8A7740_CLK_SDHI0 R8A7740_CLK_SDHI1

				R8A7740_CLK_MMC R8A7740_CLK_GETHER R8A7740_CLK_TPU0
@@ -535,7 +535,7 @@ 
				 <&cpg_clocks R8A7740_CLK_HP>,

				 <&cpg_clocks R8A7740_CLK_HP>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			clock-indices = <

				R8A7740_CLK_USBH R8A7740_CLK_SDHI2

				R8A7740_CLK_USBFUNC R8A7740_CLK_USBPHY

			>;

arch/arm/boot/dts/r8a7779.dtsi

+24 −15
Original line number Diff line number Diff line
@@ -12,6 +12,7 @@ 
/include/ "skeleton.dtsi"



#include <dt-bindings/clock/r8a7779-clock.h>

#include <dt-bindings/interrupt-controller/arm-gic.h>

#include <dt-bindings/interrupt-controller/irq.h>



/ {
@@ -62,6 +63,14 @@ 
		      <0xf0000100 0x100>;

	};



	timer@f0000600 {

		compatible = "arm,cortex-a9-twd-timer";

		reg = <0xf0000600 0x20>;

		interrupts = <GIC_PPI 13

			(GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;

		clocks = <&cpg_clocks R8A7779_CLK_ZS>;

	};



	gpio0: gpio@ffc40000 {

		compatible = "renesas,gpio-r8a7779", "renesas,gpio-rcar";

		reg = <0xffc40000 0x2c>;
@@ -200,7 +209,7 @@ 
		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe40000 0x100>;

		interrupts = <0 88 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clocks = <&mstp0_clks R8A7779_CLK_SCIF0>;

		clock-names = "sci_ick";

		status = "disabled";

	};
@@ -209,7 +218,7 @@ 
		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe41000 0x100>;

		interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clocks = <&mstp0_clks R8A7779_CLK_SCIF1>;

		clock-names = "sci_ick";

		status = "disabled";

	};
@@ -218,7 +227,7 @@ 
		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe42000 0x100>;

		interrupts = <0 90 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clocks = <&mstp0_clks R8A7779_CLK_SCIF2>;

		clock-names = "sci_ick";

		status = "disabled";

	};
@@ -227,7 +236,7 @@ 
		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe43000 0x100>;

		interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clocks = <&mstp0_clks R8A7779_CLK_SCIF3>;

		clock-names = "sci_ick";

		status = "disabled";

	};
@@ -236,7 +245,7 @@ 
		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe44000 0x100>;

		interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clocks = <&mstp0_clks R8A7779_CLK_SCIF4>;

		clock-names = "sci_ick";

		status = "disabled";

	};
@@ -245,7 +254,7 @@ 
		compatible = "renesas,scif-r8a7779", "renesas,scif";

		reg = <0xffe45000 0x100>;

		interrupts = <0 93 IRQ_TYPE_LEVEL_HIGH>;

		clocks = <&cpg_clocks R8A7779_CLK_P>;

		clocks = <&mstp0_clks R8A7779_CLK_SCIF5>;

		clock-names = "sci_ick";

		status = "disabled";

	};
@@ -464,18 +473,18 @@ 
				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_S>,

				 <&cpg_clocks R8A7779_CLK_S>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_S1>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_P>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			clock-indices = <

				R8A7779_CLK_HSPI R8A7779_CLK_TMU2

				R8A7779_CLK_TMU1 R8A7779_CLK_TMU0

				R8A7779_CLK_HSCIF1 R8A7779_CLK_HSCIF0
@@ -506,7 +515,7 @@ 
				 <&cpg_clocks R8A7779_CLK_P>,

				 <&cpg_clocks R8A7779_CLK_S>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			clock-indices = <

				R8A7779_CLK_USB01 R8A7779_CLK_USB2

				R8A7779_CLK_DU R8A7779_CLK_VIN2

				R8A7779_CLK_VIN1 R8A7779_CLK_VIN0
@@ -527,7 +536,7 @@ 
			clocks = <&s4_clk>, <&s4_clk>, <&s4_clk>, <&s4_clk>,

				 <&s4_clk>, <&s4_clk>;

			#clock-cells = <1>;

			renesas,clock-indices = <

			clock-indices = <

				R8A7779_CLK_SDHI3 R8A7779_CLK_SDHI2

				R8A7779_CLK_SDHI1 R8A7779_CLK_SDHI0

				R8A7779_CLK_MMC1 R8A7779_CLK_MMC0