Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0ba44351 authored by David S. Miller's avatar David S. Miller
Browse files

Merge branch 'sh_eth-remove-obsolete-platform_ids' 



Geert Uytterhoeven says:

====================
sh_eth: Remove obsolete platform_device_id entries

Since commit 3d7608e4 ("ARM: shmobile: bockw: remove legacy
board file and config"), which is in v4.4-rc1, shmobile SoCs are only
supported in generic DT-only ARM multi-platform builds.  The sh_eth
driver doesn't need to match platform devices by name anymore, hence
this series removes the corresponding platform_device_id entries.

Changes since v2:
  - More Acks,
  - Platform dependency has entered mainline,

Changes since v1:
  - Protect some data and functions by #ifdef CONFIG_OF to silence
    unused compiler warnings on SH,
  - New patches 3 and 4.

Thanks for applying!
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents bad53162 1af2729c

drivers/net/ethernet/renesas/sh_eth.c

+104 −109
Original line number Diff line number Diff line
@@ -449,6 +449,109 @@ static void sh_eth_set_duplex(struct net_device *ndev) 
		sh_eth_write(ndev, sh_eth_read(ndev, ECMR) & ~ECMR_DM, ECMR);

}



static void sh_eth_chip_reset(struct net_device *ndev)

{

	struct sh_eth_private *mdp = netdev_priv(ndev);



	/* reset device */

	sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);

	mdelay(1);

}



static void sh_eth_set_rate_gether(struct net_device *ndev)

{

	struct sh_eth_private *mdp = netdev_priv(ndev);



	switch (mdp->speed) {

	case 10: /* 10BASE */

		sh_eth_write(ndev, GECMR_10, GECMR);

		break;

	case 100:/* 100BASE */

		sh_eth_write(ndev, GECMR_100, GECMR);

		break;

	case 1000: /* 1000BASE */

		sh_eth_write(ndev, GECMR_1000, GECMR);

		break;

	default:

		break;

	}

}



#ifdef CONFIG_OF

/* R7S72100 */

static struct sh_eth_cpu_data r7s72100_data = {

	.chip_reset	= sh_eth_chip_reset,

	.set_duplex	= sh_eth_set_duplex,



	.register_type	= SH_ETH_REG_FAST_RZ,



	.ecsr_value	= ECSR_ICD,

	.ecsipr_value	= ECSIPR_ICDIP,

	.eesipr_value	= 0xff7f009f,



	.tx_check	= EESR_TC1 | EESR_FTC,

	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |

			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |

			  EESR_TDE | EESR_ECI,

	.fdr_value	= 0x0000070f,



	.no_psr		= 1,

	.apr		= 1,

	.mpr		= 1,

	.tpauser	= 1,

	.hw_swap	= 1,

	.rpadir		= 1,

	.rpadir_value   = 2 << 16,

	.no_trimd	= 1,

	.no_ade		= 1,

	.hw_crc		= 1,

	.tsu		= 1,

	.shift_rd0	= 1,

};



static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)

{

	struct sh_eth_private *mdp = netdev_priv(ndev);



	/* reset device */

	sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);

	mdelay(1);



	sh_eth_select_mii(ndev);

}



/* R8A7740 */

static struct sh_eth_cpu_data r8a7740_data = {

	.chip_reset	= sh_eth_chip_reset_r8a7740,

	.set_duplex	= sh_eth_set_duplex,

	.set_rate	= sh_eth_set_rate_gether,



	.register_type	= SH_ETH_REG_GIGABIT,



	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,



	.tx_check	= EESR_TC1 | EESR_FTC,

	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |

			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |

			  EESR_TDE | EESR_ECI,

	.fdr_value	= 0x0000070f,



	.apr		= 1,

	.mpr		= 1,

	.tpauser	= 1,

	.bculr		= 1,

	.hw_swap	= 1,

	.rpadir		= 1,

	.rpadir_value   = 2 << 16,

	.no_trimd	= 1,

	.no_ade		= 1,

	.tsu		= 1,

	.select_mii	= 1,

	.shift_rd0	= 1,

};



/* There is CPU dependent code */

static void sh_eth_set_rate_r8a777x(struct net_device *ndev)

{
@@ -514,6 +617,7 @@ static struct sh_eth_cpu_data r8a779x_data = { 
	.hw_swap	= 1,

	.rmiimode	= 1,

};

#endif /* CONFIG_OF */



static void sh_eth_set_rate_sh7724(struct net_device *ndev)

{
@@ -671,34 +775,6 @@ static struct sh_eth_cpu_data sh7757_data_giga = { 
	.tsu		= 1,

};



static void sh_eth_chip_reset(struct net_device *ndev)

{

	struct sh_eth_private *mdp = netdev_priv(ndev);



	/* reset device */

	sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);

	mdelay(1);

}



static void sh_eth_set_rate_gether(struct net_device *ndev)

{

	struct sh_eth_private *mdp = netdev_priv(ndev);



	switch (mdp->speed) {

	case 10: /* 10BASE */

		sh_eth_write(ndev, GECMR_10, GECMR);

		break;

	case 100:/* 100BASE */

		sh_eth_write(ndev, GECMR_100, GECMR);

		break;

	case 1000: /* 1000BASE */

		sh_eth_write(ndev, GECMR_1000, GECMR);

		break;

	default:

		break;

	}

}



/* SH7734 */

static struct sh_eth_cpu_data sh7734_data = {

	.chip_reset	= sh_eth_chip_reset,
@@ -756,80 +832,6 @@ static struct sh_eth_cpu_data sh7763_data = { 
	.irq_flags	= IRQF_SHARED,

};



static void sh_eth_chip_reset_r8a7740(struct net_device *ndev)

{

	struct sh_eth_private *mdp = netdev_priv(ndev);



	/* reset device */

	sh_eth_tsu_write(mdp, ARSTR_ARSTR, ARSTR);

	mdelay(1);



	sh_eth_select_mii(ndev);

}



/* R8A7740 */

static struct sh_eth_cpu_data r8a7740_data = {

	.chip_reset	= sh_eth_chip_reset_r8a7740,

	.set_duplex	= sh_eth_set_duplex,

	.set_rate	= sh_eth_set_rate_gether,



	.register_type	= SH_ETH_REG_GIGABIT,



	.ecsr_value	= ECSR_ICD | ECSR_MPD,

	.ecsipr_value	= ECSIPR_LCHNGIP | ECSIPR_ICDIP | ECSIPR_MPDIP,

	.eesipr_value	= DMAC_M_RFRMER | DMAC_M_ECI | 0x003fffff,



	.tx_check	= EESR_TC1 | EESR_FTC,

	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |

			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |

			  EESR_TDE | EESR_ECI,

	.fdr_value	= 0x0000070f,



	.apr		= 1,

	.mpr		= 1,

	.tpauser	= 1,

	.bculr		= 1,

	.hw_swap	= 1,

	.rpadir		= 1,

	.rpadir_value   = 2 << 16,

	.no_trimd	= 1,

	.no_ade		= 1,

	.tsu		= 1,

	.select_mii	= 1,

	.shift_rd0	= 1,

};



/* R7S72100 */

static struct sh_eth_cpu_data r7s72100_data = {

	.chip_reset	= sh_eth_chip_reset,

	.set_duplex	= sh_eth_set_duplex,



	.register_type	= SH_ETH_REG_FAST_RZ,



	.ecsr_value	= ECSR_ICD,

	.ecsipr_value	= ECSIPR_ICDIP,

	.eesipr_value	= 0xff7f009f,



	.tx_check	= EESR_TC1 | EESR_FTC,

	.eesr_err_check	= EESR_TWB1 | EESR_TWB | EESR_TABT | EESR_RABT |

			  EESR_RFE | EESR_RDE | EESR_RFRMER | EESR_TFE |

			  EESR_TDE | EESR_ECI,

	.fdr_value	= 0x0000070f,



	.no_psr		= 1,

	.apr		= 1,

	.mpr		= 1,

	.tpauser	= 1,

	.hw_swap	= 1,

	.rpadir		= 1,

	.rpadir_value   = 2 << 16,

	.no_trimd	= 1,

	.no_ade		= 1,

	.hw_crc		= 1,

	.tsu		= 1,

	.shift_rd0	= 1,

};



static struct sh_eth_cpu_data sh7619_data = {

	.register_type	= SH_ETH_REG_FAST_SH3_SH2,
@@ -3277,13 +3279,6 @@ static struct platform_device_id sh_eth_id_table[] = { 
	{ "sh7757-ether", (kernel_ulong_t)&sh7757_data },

	{ "sh7757-gether", (kernel_ulong_t)&sh7757_data_giga },

	{ "sh7763-gether", (kernel_ulong_t)&sh7763_data },

	{ "r7s72100-ether", (kernel_ulong_t)&r7s72100_data },

	{ "r8a7740-gether", (kernel_ulong_t)&r8a7740_data },

	{ "r8a777x-ether", (kernel_ulong_t)&r8a777x_data },

	{ "r8a7790-ether", (kernel_ulong_t)&r8a779x_data },

	{ "r8a7791-ether", (kernel_ulong_t)&r8a779x_data },

	{ "r8a7793-ether", (kernel_ulong_t)&r8a779x_data },

	{ "r8a7794-ether", (kernel_ulong_t)&r8a779x_data },

	{ }

};

MODULE_DEVICE_TABLE(platform, sh_eth_id_table);