Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 0afe832e authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge branch 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip 

Pull x86 cleanups from Ingo Molnar:
 "Misc cleanups"

* 'x86-cleanups-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
  x86/apm: Fix spelling mistake: "caculate" -> "calculate"
  x86/mtrr: Rename main.c to mtrr.c and remove duplicate prefixes
  x86: Remove pr_fmt duplicate logging prefixes
  x86/early-quirks: Rename duplicate define of dev_err
  x86/bpf: Clean up non-standard comments, to make the code more readable
parents 42964c6f 844ea8f6

arch/x86/events/amd/ibs.c

+1 −1
Original line number Diff line number Diff line
@@ -889,7 +889,7 @@ static void force_ibs_eilvt_setup(void) 
	if (!ibs_eilvt_valid())

		goto out;



	pr_info("IBS: LVT offset %d assigned\n", offset);

	pr_info("LVT offset %d assigned\n", offset);



	return;

out:

arch/x86/kernel/apm_32.c

+1 −1
Original line number Diff line number Diff line
@@ -2433,7 +2433,7 @@ MODULE_PARM_DESC(idle_threshold, 
	"System idle percentage above which to make APM BIOS idle calls");

module_param(idle_period, int, 0444);

MODULE_PARM_DESC(idle_period,

	"Period (in sec/100) over which to caculate the idle percentage");

	"Period (in sec/100) over which to calculate the idle percentage");

module_param(smp, bool, 0444);

MODULE_PARM_DESC(smp,

	"Set this to enable APM use on an SMP platform. Use with caution on older systems");

arch/x86/kernel/cpu/mtrr/Makefile

+1 −1
Original line number Diff line number Diff line 
obj-y		:= main.o if.o generic.o cleanup.o

obj-y		:= mtrr.o if.o generic.o cleanup.o

obj-$(CONFIG_X86_32) += amd.o cyrix.o centaur.o

arch/x86/kernel/cpu/mtrr/main.c→arch/x86/kernel/cpu/mtrr/mtrr.c

+16 −17
Original line number Diff line number Diff line
@@ -101,7 +101,7 @@ static int have_wrcomb(void) 
		if (dev->vendor == PCI_VENDOR_ID_SERVERWORKS &&

		    dev->device == PCI_DEVICE_ID_SERVERWORKS_LE &&

		    dev->revision <= 5) {

			pr_info("mtrr: Serverworks LE rev < 6 detected. Write-combining disabled.\n");

			pr_info("Serverworks LE rev < 6 detected. Write-combining disabled.\n");

			pci_dev_put(dev);

			return 0;

		}
@@ -111,7 +111,7 @@ static int have_wrcomb(void) 
		 */

		if (dev->vendor == PCI_VENDOR_ID_INTEL &&

		    dev->device == PCI_DEVICE_ID_INTEL_82451NX) {

			pr_info("mtrr: Intel 450NX MMC detected. Write-combining disabled.\n");

			pr_info("Intel 450NX MMC detected. Write-combining disabled.\n");

			pci_dev_put(dev);

			return 0;

		}
@@ -313,24 +313,24 @@ int mtrr_add_page(unsigned long base, unsigned long size, 
		return error;



	if (type >= MTRR_NUM_TYPES) {

		pr_warn("mtrr: type: %u invalid\n", type);

		pr_warn("type: %u invalid\n", type);

		return -EINVAL;

	}



	/* If the type is WC, check that this processor supports it */

	if ((type == MTRR_TYPE_WRCOMB) && !have_wrcomb()) {

		pr_warn("mtrr: your processor doesn't support write-combining\n");

		pr_warn("your processor doesn't support write-combining\n");

		return -ENOSYS;

	}



	if (!size) {

		pr_warn("mtrr: zero sized request\n");

		pr_warn("zero sized request\n");

		return -EINVAL;

	}



	if ((base | (base + size - 1)) >>

	    (boot_cpu_data.x86_phys_bits - PAGE_SHIFT)) {

		pr_warn("mtrr: base or size exceeds the MTRR width\n");

		pr_warn("base or size exceeds the MTRR width\n");

		return -EINVAL;

	}
@@ -361,8 +361,7 @@ int mtrr_add_page(unsigned long base, unsigned long size, 
				} else if (types_compatible(type, ltype))

					continue;

			}

			pr_warn("mtrr: 0x%lx000,0x%lx000 overlaps existing"

				" 0x%lx000,0x%lx000\n", base, size, lbase,

			pr_warn("0x%lx000,0x%lx000 overlaps existing 0x%lx000,0x%lx000\n", base, size, lbase,

				lsize);

			goto out;

		}
@@ -370,7 +369,7 @@ int mtrr_add_page(unsigned long base, unsigned long size, 
		if (ltype != type) {

			if (types_compatible(type, ltype))

				continue;

			pr_warn("mtrr: type mismatch for %lx000,%lx000 old: %s new: %s\n",

			pr_warn("type mismatch for %lx000,%lx000 old: %s new: %s\n",

				base, size, mtrr_attrib_to_str(ltype),

				mtrr_attrib_to_str(type));

			goto out;
@@ -396,7 +395,7 @@ int mtrr_add_page(unsigned long base, unsigned long size, 
			}

		}

	} else {

		pr_info("mtrr: no more MTRRs available\n");

		pr_info("no more MTRRs available\n");

	}

	error = i;

 out:
@@ -408,8 +407,8 @@ int mtrr_add_page(unsigned long base, unsigned long size, 
static int mtrr_check(unsigned long base, unsigned long size)

{

	if ((base & (PAGE_SIZE - 1)) || (size & (PAGE_SIZE - 1))) {

		pr_warn("mtrr: size and base must be multiples of 4 kiB\n");

		pr_debug("mtrr: size: 0x%lx  base: 0x%lx\n", size, base);

		pr_warn("size and base must be multiples of 4 kiB\n");

		pr_debug("size: 0x%lx  base: 0x%lx\n", size, base);

		dump_stack();

		return -1;

	}
@@ -500,22 +499,22 @@ int mtrr_del_page(int reg, unsigned long base, unsigned long size) 
			}

		}

		if (reg < 0) {

			pr_debug("mtrr: no MTRR for %lx000,%lx000 found\n",

			pr_debug("no MTRR for %lx000,%lx000 found\n",

				 base, size);

			goto out;

		}

	}

	if (reg >= max) {

		pr_warn("mtrr: register: %d too big\n", reg);

		pr_warn("register: %d too big\n", reg);

		goto out;

	}

	mtrr_if->get(reg, &lbase, &lsize, &ltype);

	if (lsize < 1) {

		pr_warn("mtrr: MTRR %d not used\n", reg);

		pr_warn("MTRR %d not used\n", reg);

		goto out;

	}

	if (mtrr_usage_table[reg] < 1) {

		pr_warn("mtrr: reg: %d has count=0\n", reg);

		pr_warn("reg: %d has count=0\n", reg);

		goto out;

	}

	if (--mtrr_usage_table[reg] < 1)
@@ -776,7 +775,7 @@ void __init mtrr_bp_init(void) 
	}



	if (!mtrr_enabled()) {

		pr_info("MTRR: Disabled\n");

		pr_info("Disabled\n");



		/*

		 * PAT initialization relies on MTRR's rendezvous handler.

arch/x86/kernel/e820.c

+17 −15
Original line number Diff line number Diff line
@@ -155,7 +155,8 @@ static void __init __e820__range_add(struct e820_table *table, u64 start, u64 si 
	int x = table->nr_entries;



	if (x >= ARRAY_SIZE(table->entries)) {

		pr_err("e820: too many entries; ignoring [mem %#010llx-%#010llx]\n", start, start + size - 1);

		pr_err("too many entries; ignoring [mem %#010llx-%#010llx]\n",

		       start, start + size - 1);

		return;

	}
@@ -190,7 +191,8 @@ void __init e820__print_table(char *who) 
	int i;



	for (i = 0; i < e820_table->nr_entries; i++) {

		pr_info("%s: [mem %#018Lx-%#018Lx] ", who,

		pr_info("%s: [mem %#018Lx-%#018Lx] ",

			who,

			e820_table->entries[i].addr,

			e820_table->entries[i].addr + e820_table->entries[i].size - 1);
@@ -574,7 +576,7 @@ void __init e820__update_table_print(void) 
	if (e820__update_table(e820_table))

		return;



	pr_info("e820: modified physical RAM map:\n");

	pr_info("modified physical RAM map:\n");

	e820__print_table("modified");

}
@@ -636,9 +638,8 @@ __init void e820__setup_pci_gap(void) 
	if (!found) {

#ifdef CONFIG_X86_64

		gapstart = (max_pfn << PAGE_SHIFT) + 1024*1024;

		pr_err(

			"e820: Cannot find an available gap in the 32-bit address range\n"

			"e820: PCI devices with unassigned 32-bit BARs may not work!\n");

		pr_err("Cannot find an available gap in the 32-bit address range\n");

		pr_err("PCI devices with unassigned 32-bit BARs may not work!\n");

#else

		gapstart = 0x10000000;

#endif
@@ -649,7 +650,8 @@ __init void e820__setup_pci_gap(void) 
	 */

	pci_mem_start = gapstart;



	pr_info("e820: [mem %#010lx-%#010lx] available for PCI devices\n", gapstart, gapstart + gapsize - 1);

	pr_info("[mem %#010lx-%#010lx] available for PCI devices\n",

		gapstart, gapstart + gapsize - 1);

}



/*
@@ -711,7 +713,7 @@ void __init e820__memory_setup_extended(u64 phys_addr, u32 data_len) 
	memcpy(e820_table_firmware, e820_table, sizeof(*e820_table_firmware));



	early_memunmap(sdata, data_len);

	pr_info("e820: extended physical RAM map:\n");

	pr_info("extended physical RAM map:\n");

	e820__print_table("extended");

}
@@ -780,7 +782,7 @@ u64 __init e820__memblock_alloc_reserved(u64 size, u64 align) 
	addr = __memblock_alloc_base(size, align, MEMBLOCK_ALLOC_ACCESSIBLE);

	if (addr) {

		e820__range_update_kexec(addr, size, E820_TYPE_RAM, E820_TYPE_RESERVED);

		pr_info("e820: update e820_table_kexec for e820__memblock_alloc_reserved()\n");

		pr_info("update e820_table_kexec for e820__memblock_alloc_reserved()\n");

		e820__update_table_kexec();

	}
@@ -830,7 +832,7 @@ static unsigned long __init e820_end_pfn(unsigned long limit_pfn, enum e820_type 
	if (last_pfn > max_arch_pfn)

		last_pfn = max_arch_pfn;



	pr_info("e820: last_pfn = %#lx max_arch_pfn = %#lx\n",

	pr_info("last_pfn = %#lx max_arch_pfn = %#lx\n",

		last_pfn, max_arch_pfn);

	return last_pfn;

}
@@ -1005,7 +1007,7 @@ void __init e820__finish_early_params(void) 
		if (e820__update_table(e820_table) < 0)

			early_panic("Invalid user supplied memory map");



		pr_info("e820: user-defined physical RAM map:\n");

		pr_info("user-defined physical RAM map:\n");

		e820__print_table("user");

	}

}
@@ -1238,7 +1240,7 @@ void __init e820__memory_setup(void) 
	memcpy(e820_table_kexec, e820_table, sizeof(*e820_table_kexec));

	memcpy(e820_table_firmware, e820_table, sizeof(*e820_table_firmware));



	pr_info("e820: BIOS-provided physical RAM map:\n");

	pr_info("BIOS-provided physical RAM map:\n");

	e820__print_table(who);

}