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Commit 0ac642c5 authored by Tom St Denis's avatar Tom St Denis Committed by Alex Deucher
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drm/amd/amdgpu: clean up gfx_v8_0_kiq_init_register() 



Swap read/write pattern for WREG32_FIELD()

Signed-off-by: default avatarTom St Denis <tom.stdenis@amd.com>
Reviewed-by: default avatarChristian König <christian.koenig@amd.com>
Signed-off-by: default avatarAlex Deucher <alexander.deucher@amd.com>
parent 35e259d5

drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c

+3 −9
Original line number Diff line number Diff line
@@ -4817,13 +4817,10 @@ static int gfx_v8_0_kiq_init_register(struct amdgpu_ring *ring) 
{

	struct amdgpu_device *adev = ring->adev;

	struct vi_mqd *mqd = ring->mqd_ptr;

	uint32_t tmp;

	int j;



	/* disable wptr polling */

	tmp = RREG32(mmCP_PQ_WPTR_POLL_CNTL);

	tmp = REG_SET_FIELD(tmp, CP_PQ_WPTR_POLL_CNTL, EN, 0);

	WREG32(mmCP_PQ_WPTR_POLL_CNTL, tmp);

	WREG32_FIELD(CP_PQ_WPTR_POLL_CNTL, EN, 0);



	WREG32(mmCP_HQD_EOP_BASE_ADDR, mqd->cp_hqd_eop_base_addr_lo);

	WREG32(mmCP_HQD_EOP_BASE_ADDR_HI, mqd->cp_hqd_eop_base_addr_hi);
@@ -4895,11 +4892,8 @@ static int gfx_v8_0_kiq_init_register(struct amdgpu_ring *ring) 
	/* activate the queue */

	WREG32(mmCP_HQD_ACTIVE, mqd->cp_hqd_active);



	if (ring->use_doorbell) {

		tmp = RREG32(mmCP_PQ_STATUS);

		tmp = REG_SET_FIELD(tmp, CP_PQ_STATUS, DOORBELL_ENABLE, 1);

		WREG32(mmCP_PQ_STATUS, tmp);

	}

	if (ring->use_doorbell)

		WREG32_FIELD(CP_PQ_STATUS, DOORBELL_ENABLE, 1);



	return 0;

}