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Commit 06b23d93 authored by Jeeja KP's avatar Jeeja KP Committed by Mark Brown
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ASoC: Intel: Skylake: Update pcm capability



This patch adds pcm capability to support 16/8k rates and 32 bit formats

Signed-off-by: default avatarJeeja KP <jeeja.kp@intel.com>
Signed-off-by: default avatarVinod Koul <vinod.koul@intel.com>
Signed-off-by: default avatarMark Brown <broonie@kernel.org>
parent 98256f83
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+6 −3
Original line number Diff line number Diff line
@@ -39,9 +39,12 @@ static struct snd_pcm_hardware azx_pcm_hw = {
				 SNDRV_PCM_INFO_HAS_WALL_CLOCK | /* legacy */
				 SNDRV_PCM_INFO_HAS_LINK_ATIME |
				 SNDRV_PCM_INFO_NO_PERIOD_WAKEUP),
	.formats =		SNDRV_PCM_FMTBIT_S16_LE,
	.rates =		SNDRV_PCM_RATE_48000,
	.rate_min =		48000,
	.formats =		SNDRV_PCM_FMTBIT_S16_LE |
				SNDRV_PCM_FMTBIT_S32_LE |
				SNDRV_PCM_FMTBIT_S24_LE,
	.rates =		SNDRV_PCM_RATE_48000 | SNDRV_PCM_RATE_16000 |
				SNDRV_PCM_RATE_8000,
	.rate_min =		8000,
	.rate_max =		48000,
	.channels_min =		2,
	.channels_max =		2,