bus: omap_l3_noc: use of_match_data to pick up SoC information (0659452d) · Commits · e / devices / android_kernel_xiaomi_nabu

drivers/bus/omap_l3_noc.c

+32 −23

Original line number	Original line	Diff line number	Diff line
	@@ -14,12 +14,14 @@
	* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the		* of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	* GNU General Public License for more details.		* GNU General Public License for more details.
	*/		*/
	#include <linux/module.h>
	#include <linux/init.h>		#include <linux/init.h>
	#include <linux/io.h>
	#include <linux/platform_device.h>
	#include <linux/interrupt.h>		#include <linux/interrupt.h>
			#include <linux/io.h>
	#include <linux/kernel.h>		#include <linux/kernel.h>
			#include <linux/module.h>
			#include <linux/of_device.h>
			#include <linux/of.h>
			#include <linux/platform_device.h>
	#include <linux/slab.h>		#include <linux/slab.h>

	#include "omap_l3_noc.h"		#include "omap_l3_noc.h"
	@@ -58,17 +60,18 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
	void __iomem l3_targ_stderr, l3_targ_slvofslsb, *l3_targ_mstaddr;		void __iomem l3_targ_stderr, l3_targ_slvofslsb, *l3_targ_mstaddr;
	char target_name, master_name = "UN IDENTIFIED";		char target_name, master_name = "UN IDENTIFIED";
	struct l3_target_data *l3_targ_inst;		struct l3_target_data *l3_targ_inst;
			struct l3_masters_data *master;

	/* Get the Type of interrupt */		/* Get the Type of interrupt */
	inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;		inttype = irq == l3->app_irq ? L3_APPLICATION_ERROR : L3_DEBUG_ERROR;

	for (i = 0; i < L3_MODULES; i++) {		for (i = 0; i < l3->num_modules; i++) {
	/*		/*
	* Read the regerr register of the clock domain		* Read the regerr register of the clock domain
	* to determine the source		* to determine the source
	*/		*/
	base = l3->l3_base[i];		base = l3->l3_base[i];
	err_reg = readl_relaxed(base + l3_flagmux[i] +		err_reg = readl_relaxed(base + l3->l3_flagmux[i] +
	L3_FLAGMUX_REGERR0 + (inttype << 3));		L3_FLAGMUX_REGERR0 + (inttype << 3));

	/* Get the corresponding error and analyse */		/* Get the corresponding error and analyse */
	@@ -79,7 +82,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
	/* We DONOT expect err_src to go out of bounds */		/* We DONOT expect err_src to go out of bounds */
	BUG_ON(err_src > MAX_CLKDM_TARGETS);		BUG_ON(err_src > MAX_CLKDM_TARGETS);

	l3_targ_inst = &l3_targ[i][err_src];		l3_targ_inst = &l3->l3_targ[i][err_src];
	target_name = l3_targ_inst->name;		target_name = l3_targ_inst->name;
	l3_targ_base = base + l3_targ_inst->offset;		l3_targ_base = base + l3_targ_inst->offset;

	@@ -101,7 +104,7 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
	inttype ? "debug" : "application",		inttype ? "debug" : "application",
	err_src, i, "(unclearable)");		err_src, i, "(unclearable)");

	mask_reg = base + l3_flagmux[i] +		mask_reg = base + l3->l3_flagmux[i] +
	L3_FLAGMUX_MASK0 + (inttype << 3);		L3_FLAGMUX_MASK0 + (inttype << 3);
	mask_val = readl_relaxed(mask_reg);		mask_val = readl_relaxed(mask_reg);
	mask_val &= ~(1 << err_src);		mask_val &= ~(1 << err_src);
	@@ -131,10 +134,12 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
	break;		break;

	case CUSTOM_ERROR:		case CUSTOM_ERROR:
	for (k = 0; k < NUM_OF_L3_MASTERS; k++) {		for (k = 0, master = l3->l3_masters;
	if (masterid == l3_masters[k].id)		k < l3->num_masters; k++, master++) {
	master_name =		if (masterid == master->id) {
	l3_masters[k].name;		master_name = master->name;
			break;
			}
	}		}
	WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",		WARN(true, "L3 custom error: MASTER:%s TARGET:%s\n",
	master_name, target_name);		master_name, target_name);
	@@ -154,20 +159,34 @@ static irqreturn_t l3_interrupt_handler(int irq, void *_l3)
	return IRQ_HANDLED;		return IRQ_HANDLED;
	}		}

			static const struct of_device_id l3_noc_match[] = {
			{.compatible = "ti,omap4-l3-noc", .data = &omap_l3_data},
			{},
			};
			MODULE_DEVICE_TABLE(of, l3_noc_match);

	static int omap_l3_probe(struct platform_device *pdev)		static int omap_l3_probe(struct platform_device *pdev)
	{		{
			const struct of_device_id *of_id;
	static struct omap_l3 *l3;		static struct omap_l3 *l3;
	int ret, i;		int ret, i;

			of_id = of_match_device(l3_noc_match, &pdev->dev);
			if (!of_id) {
			dev_err(&pdev->dev, "OF data missing\n");
			return -EINVAL;
			}

	l3 = devm_kzalloc(&pdev->dev, sizeof(*l3), GFP_KERNEL);		l3 = devm_kzalloc(&pdev->dev, sizeof(*l3), GFP_KERNEL);
	if (!l3)		if (!l3)
	return -ENOMEM;		return -ENOMEM;

			memcpy(l3, of_id->data, sizeof(*l3));
	l3->dev = &pdev->dev;		l3->dev = &pdev->dev;
	platform_set_drvdata(pdev, l3);		platform_set_drvdata(pdev, l3);

	/* Get mem resources */		/* Get mem resources */
	for (i = 0; i < L3_MODULES; i++) {		for (i = 0; i < l3->num_modules; i++) {
	struct resource *res = platform_get_resource(pdev,		struct resource *res = platform_get_resource(pdev,
	IORESOURCE_MEM, i);		IORESOURCE_MEM, i);

	@@ -199,22 +218,12 @@ static int omap_l3_probe(struct platform_device *pdev)
	return ret;		return ret;
	}		}

	#if defined(CONFIG_OF)
	static const struct of_device_id l3_noc_match[] = {
	{.compatible = "ti,omap4-l3-noc", },
	{},
	};
	MODULE_DEVICE_TABLE(of, l3_noc_match);
	#else
	#define l3_noc_match NULL
	#endif

	static struct platform_driver omap_l3_driver = {		static struct platform_driver omap_l3_driver = {
	.probe = omap_l3_probe,		.probe = omap_l3_probe,
	.driver = {		.driver = {
	.name = "omap_l3_noc",		.name = "omap_l3_noc",
	.owner = THIS_MODULE,		.owner = THIS_MODULE,
	.of_match_table = l3_noc_match,		.of_match_table = of_match_ptr(l3_noc_match),
	},		},
	};		};

drivers/bus/omap_l3_noc.h

+52 −20

Original line number	Original line	Diff line number	Diff line
	@@ -17,7 +17,9 @@
	#ifndef __OMAP_L3_NOC_H		#ifndef __OMAP_L3_NOC_H
	#define __OMAP_L3_NOC_H		#define __OMAP_L3_NOC_H

	#define L3_MODULES 3		#define OMAP_L3_MODULES 3
			#define MAX_L3_MODULES 3

	#define CLEAR_STDERR_LOG (1 << 31)		#define CLEAR_STDERR_LOG (1 << 31)
	#define CUSTOM_ERROR 0x2		#define CUSTOM_ERROR 0x2
	#define STANDARD_ERROR 0x0		#define STANDARD_ERROR 0x0
	@@ -36,8 +38,6 @@

	#define MAX_CLKDM_TARGETS 31		#define MAX_CLKDM_TARGETS 31

	#define NUM_OF_L3_MASTERS (sizeof(l3_masters)/sizeof(l3_masters[0]))

	/**		/**
	* struct l3_masters_data - L3 Master information		* struct l3_masters_data - L3 Master information
	* @id: ID of the L3 Master		* @id: ID of the L3 Master
	@@ -60,13 +60,47 @@ struct l3_target_data {
	char *name;		char *name;
	};		};

	static u32 l3_flagmux[L3_MODULES] = {
			/**
			* struct omap_l3 - Description of data relevant for L3 bus.
			* @dev: device representing the bus (populated runtime)
			* @l3_base: base addresses of modules (populated runtime)
			* @l3_flag_mux: array containing offsets to flag mux per module
			* offset from corresponding module base indexed per
			* module.
			* @num_modules: number of clock domains / modules.
			* @l3_masters: array pointing to master data containing name and register
			* offset for the master.
			* @num_master: number of masters
			* @l3_targ: array indexed by flagmux index (bit offset) pointing to the
			* target data. unsupported ones are marked with
			* L3_TARGET_NOT_SUPPORTED
			* @debug_irq: irq number of the debug interrupt (populated runtime)
			* @app_irq: irq number of the application interrupt (populated runtime)
			*/
			struct omap_l3 {
			struct device *dev;

			void __iomem *l3_base[MAX_L3_MODULES];
			u32 *l3_flagmux;
			int num_modules;

			struct l3_masters_data *l3_masters;
			int num_masters;

			struct l3_target_data **l3_targ;

			int debug_irq;
			int app_irq;
			};

			static u32 omap_l3_flagmux[OMAP_L3_MODULES] = {
	0x500,		0x500,
	0x1000,		0x1000,
	0X0200		0X0200
	};		};

	static struct l3_target_data l3_target_inst_data_clk1[MAX_CLKDM_TARGETS] = {		static struct l3_target_data omap_l3_target_data_clk1[MAX_CLKDM_TARGETS] = {
	{0x100, "DMM1",},		{0x100, "DMM1",},
	{0x200, "DMM2",},		{0x200, "DMM2",},
	{0x300, "ABE",},		{0x300, "ABE",},
	@@ -76,7 +110,7 @@ static struct l3_target_data l3_target_inst_data_clk1[MAX_CLKDM_TARGETS] = {
	{0x900, "L4WAKEUP",},		{0x900, "L4WAKEUP",},
	};		};

	static struct l3_target_data l3_target_inst_data_clk2[MAX_CLKDM_TARGETS] = {		static struct l3_target_data omap_l3_target_data_clk2[MAX_CLKDM_TARGETS] = {
	{0x500, "CORTEXM3",},		{0x500, "CORTEXM3",},
	{0x300, "DSS",},		{0x300, "DSS",},
	{0x100, "GPMC",},		{0x100, "GPMC",},
	@@ -100,13 +134,13 @@ static struct l3_target_data l3_target_inst_data_clk2[MAX_CLKDM_TARGETS] = {
	{0x1700, "LLI",},		{0x1700, "LLI",},
	};		};

	static struct l3_target_data l3_target_inst_data_clk3[MAX_CLKDM_TARGETS] = {		static struct l3_target_data omap_l3_target_data_clk3[MAX_CLKDM_TARGETS] = {
	{0x0100, "EMUSS",},		{0x0100, "EMUSS",},
	{0x0300, "DEBUG SOURCE",},		{0x0300, "DEBUG SOURCE",},
	{0x0, "HOST CLK3",},		{0x0, "HOST CLK3",},
	};		};

	static struct l3_masters_data l3_masters[] = {		static struct l3_masters_data omap_l3_masters[] = {
	{ 0x0 , "MPU"},		{ 0x0 , "MPU"},
	{ 0x10, "CS_ADP"},		{ 0x10, "CS_ADP"},
	{ 0x14, "xxx"},		{ 0x14, "xxx"},
	@@ -134,20 +168,18 @@ static struct l3_masters_data l3_masters[] = {
	{ 0xC8, "USBHOSTFS"}		{ 0xC8, "USBHOSTFS"}
	};		};

	static struct l3_target_data *l3_targ[L3_MODULES] = {		static struct l3_target_data *omap_l3_targ[OMAP_L3_MODULES] = {
	l3_target_inst_data_clk1,		omap_l3_target_data_clk1,
	l3_target_inst_data_clk2,		omap_l3_target_data_clk2,
	l3_target_inst_data_clk3,		omap_l3_target_data_clk3,
	};		};

	struct omap_l3 {		static const struct omap_l3 omap_l3_data = {
	struct device *dev;		.l3_flagmux = omap_l3_flagmux,
			.num_modules = OMAP_L3_MODULES,
	/* memory base */		.l3_masters = omap_l3_masters,
	void __iomem *l3_base[L3_MODULES];		.num_masters = ARRAY_SIZE(omap_l3_masters),
			.l3_targ = omap_l3_targ,
	int debug_irq;
	int app_irq;
	};		};

	#endif /* __OMAP_L3_NOC_H */		#endif /* __OMAP_L3_NOC_H */