Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit 052bc385 authored by Breno Leitao's avatar Breno Leitao Committed by Greg Kroah-Hartman
Browse files

powerpc/tm: Remove msr_tm_active() 



[ Upstream commit 5c784c8414fba11b62e12439f11e109fb5751f38 ]

Currently msr_tm_active() is a wrapper around MSR_TM_ACTIVE() if
CONFIG_PPC_TRANSACTIONAL_MEM is set, or it is just a function that
returns false if CONFIG_PPC_TRANSACTIONAL_MEM is not set.

This function is not necessary, since MSR_TM_ACTIVE() just do the same and
could be used, removing the dualism and simplifying the code.

This patchset remove every instance of msr_tm_active() and replaced it
by MSR_TM_ACTIVE().

Signed-off-by: default avatarBreno Leitao <leitao@debian.org>
Signed-off-by: default avatarMichael Ellerman <mpe@ellerman.id.au>
Signed-off-by: default avatarSasha Levin <sashal@kernel.org>
parent f193e022

arch/powerpc/include/asm/reg.h

+6 −1
Original line number Original line Diff line number Diff line
@@ -118,11 +118,16 @@ 
#define MSR_TS_S	__MASK(MSR_TS_S_LG)	/*  Transaction Suspended */

#define MSR_TS_S	__MASK(MSR_TS_S_LG)	/*  Transaction Suspended */

#define MSR_TS_T	__MASK(MSR_TS_T_LG)	/*  Transaction Transactional */

#define MSR_TS_T	__MASK(MSR_TS_T_LG)	/*  Transaction Transactional */

#define MSR_TS_MASK	(MSR_TS_T | MSR_TS_S)   /* Transaction State bits */

#define MSR_TS_MASK	(MSR_TS_T | MSR_TS_S)   /* Transaction State bits */

#define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */

#define MSR_TM_RESV(x) (((x) & MSR_TS_MASK) == MSR_TS_MASK) /* Reserved */

#define MSR_TM_RESV(x) (((x) & MSR_TS_MASK) == MSR_TS_MASK) /* Reserved */

#define MSR_TM_TRANSACTIONAL(x)	(((x) & MSR_TS_MASK) == MSR_TS_T)

#define MSR_TM_TRANSACTIONAL(x)	(((x) & MSR_TS_MASK) == MSR_TS_T)

#define MSR_TM_SUSPENDED(x)	(((x) & MSR_TS_MASK) == MSR_TS_S)

#define MSR_TM_SUSPENDED(x)	(((x) & MSR_TS_MASK) == MSR_TS_S)





#ifdef CONFIG_PPC_TRANSACTIONAL_MEM

#define MSR_TM_ACTIVE(x) (((x) & MSR_TS_MASK) != 0) /* Transaction active? */

#else

#define MSR_TM_ACTIVE(x) 0

#endif



#if defined(CONFIG_PPC_BOOK3S_64)

#if defined(CONFIG_PPC_BOOK3S_64)

#define MSR_64BIT	MSR_SF

#define MSR_64BIT	MSR_SF

arch/powerpc/kernel/process.c

+9 −12
Original line number Original line Diff line number Diff line
@@ -102,24 +102,18 @@ static void check_if_tm_restore_required(struct task_struct *tsk) 
	}

	}

}

}





static inline bool msr_tm_active(unsigned long msr)

{

	return MSR_TM_ACTIVE(msr);

}



static bool tm_active_with_fp(struct task_struct *tsk)

static bool tm_active_with_fp(struct task_struct *tsk)

{

{

	return msr_tm_active(tsk->thread.regs->msr) &&

	return MSR_TM_ACTIVE(tsk->thread.regs->msr) &&

		(tsk->thread.ckpt_regs.msr & MSR_FP);

		(tsk->thread.ckpt_regs.msr & MSR_FP);

}

}





static bool tm_active_with_altivec(struct task_struct *tsk)

static bool tm_active_with_altivec(struct task_struct *tsk)

{

{

	return msr_tm_active(tsk->thread.regs->msr) &&

	return MSR_TM_ACTIVE(tsk->thread.regs->msr) &&

		(tsk->thread.ckpt_regs.msr & MSR_VEC);

		(tsk->thread.ckpt_regs.msr & MSR_VEC);

}

}

#else

#else

static inline bool msr_tm_active(unsigned long msr) { return false; }

static inline void check_if_tm_restore_required(struct task_struct *tsk) { }

static inline void check_if_tm_restore_required(struct task_struct *tsk) { }

static inline bool tm_active_with_fp(struct task_struct *tsk) { return false; }

static inline bool tm_active_with_fp(struct task_struct *tsk) { return false; }

static inline bool tm_active_with_altivec(struct task_struct *tsk) { return false; }

static inline bool tm_active_with_altivec(struct task_struct *tsk) { return false; }
@@ -247,7 +241,8 @@ void enable_kernel_fp(void) 
		 * giveup as this would save  to the 'live' structure not the

		 * giveup as this would save  to the 'live' structure not the

		 * checkpointed structure.

		 * checkpointed structure.

		 */

		 */

		if(!msr_tm_active(cpumsr) && msr_tm_active(current->thread.regs->msr))

		if (!MSR_TM_ACTIVE(cpumsr) &&

		     MSR_TM_ACTIVE(current->thread.regs->msr))

			return;

			return;

		__giveup_fpu(current);

		__giveup_fpu(current);

	}

	}
@@ -311,7 +306,8 @@ void enable_kernel_altivec(void) 
		 * giveup as this would save  to the 'live' structure not the

		 * giveup as this would save  to the 'live' structure not the

		 * checkpointed structure.

		 * checkpointed structure.

		 */

		 */

		if(!msr_tm_active(cpumsr) && msr_tm_active(current->thread.regs->msr))

		if (!MSR_TM_ACTIVE(cpumsr) &&

		     MSR_TM_ACTIVE(current->thread.regs->msr))

			return;

			return;

		__giveup_altivec(current);

		__giveup_altivec(current);

	}

	}
@@ -397,7 +393,8 @@ void enable_kernel_vsx(void) 
		 * giveup as this would save  to the 'live' structure not the

		 * giveup as this would save  to the 'live' structure not the

		 * checkpointed structure.

		 * checkpointed structure.

		 */

		 */

		if(!msr_tm_active(cpumsr) && msr_tm_active(current->thread.regs->msr))

		if (!MSR_TM_ACTIVE(cpumsr) &&

		     MSR_TM_ACTIVE(current->thread.regs->msr))

			return;

			return;

		__giveup_vsx(current);

		__giveup_vsx(current);

	}

	}
@@ -531,7 +528,7 @@ void restore_math(struct pt_regs *regs) 
{

{

	unsigned long msr;

	unsigned long msr;





	if (!msr_tm_active(regs->msr) &&

	if (!MSR_TM_ACTIVE(regs->msr) &&

		!current->thread.load_fp && !loadvec(current->thread))

		!current->thread.load_fp && !loadvec(current->thread))

		return;

		return;