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Commit 029e2151 authored by Rob Herring's avatar Rob Herring Committed by Bjorn Helgaas
Browse files

PCI: xilinx: Convert to use generic config accessors 



Convert the Xilinx host PCI driver to use the generic config access
functions.

Signed-off-by: default avatarRob Herring <robh@kernel.org>
Signed-off-by: default avatarBjorn Helgaas <bhelgaas@google.com>
CC: Michal Simek <michal.simek@xilinx.com>
CC: "Sören Brinkmann" <soren.brinkmann@xilinx.com>
CC: linux-arm-kernel@lists.infradead.org
parent 350f8be5

drivers/pci/host/pcie-xilinx.c

+9 −79
Original line number Diff line number Diff line
@@ -189,7 +189,7 @@ static bool xilinx_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) 
}



/**

 * xilinx_pcie_config_base - Get configuration base

 * xilinx_pcie_map_bus - Get configuration base

 * @bus: PCI Bus structure

 * @devfn: Device/function

 * @where: Offset from base
@@ -197,96 +197,26 @@ static bool xilinx_pcie_valid_device(struct pci_bus *bus, unsigned int devfn) 
 * Return: Base address of the configuration space needed to be

 *	   accessed.

 */

static void __iomem *xilinx_pcie_config_base(struct pci_bus *bus,

static void __iomem *xilinx_pcie_map_bus(struct pci_bus *bus,

					 unsigned int devfn, int where)

{

	struct xilinx_pcie_port *port = sys_to_pcie(bus->sysdata);

	int relbus;



	if (!xilinx_pcie_valid_device(bus, devfn))

		return NULL;



	relbus = (bus->number << ECAM_BUS_NUM_SHIFT) |

		 (devfn << ECAM_DEV_NUM_SHIFT);



	return port->reg_base + relbus + where;

}



/**

 * xilinx_pcie_read_config - Read configuration space

 * @bus: PCI Bus structure

 * @devfn: Device/function

 * @where: Offset from base

 * @size: Byte/word/dword

 * @val: Value to be read

 *

 * Return: PCIBIOS_SUCCESSFUL on success

 *	   PCIBIOS_DEVICE_NOT_FOUND on failure

 */

static int xilinx_pcie_read_config(struct pci_bus *bus, unsigned int devfn,

				   int where, int size, u32 *val)

{

	void __iomem *addr;



	if (!xilinx_pcie_valid_device(bus, devfn)) {

		*val = 0xFFFFFFFF;

		return PCIBIOS_DEVICE_NOT_FOUND;

	}



	addr = xilinx_pcie_config_base(bus, devfn, where);



	switch (size) {

	case 1:

		*val = readb(addr);

		break;

	case 2:

		*val = readw(addr);

		break;

	default:

		*val = readl(addr);

		break;

	}



	return PCIBIOS_SUCCESSFUL;

}



/**

 * xilinx_pcie_write_config - Write configuration space

 * @bus: PCI Bus structure

 * @devfn: Device/function

 * @where: Offset from base

 * @size: Byte/word/dword

 * @val: Value to be written to device

 *

 * Return: PCIBIOS_SUCCESSFUL on success

 *	   PCIBIOS_DEVICE_NOT_FOUND on failure

 */

static int xilinx_pcie_write_config(struct pci_bus *bus, unsigned int devfn,

				    int where, int size, u32 val)

{

	void __iomem *addr;



	if (!xilinx_pcie_valid_device(bus, devfn))

		return PCIBIOS_DEVICE_NOT_FOUND;



	addr = xilinx_pcie_config_base(bus, devfn, where);



	switch (size) {

	case 1:

		writeb(val, addr);

		break;

	case 2:

		writew(val, addr);

		break;

	default:

		writel(val, addr);

		break;

	}



	return PCIBIOS_SUCCESSFUL;

}



/* PCIe operations */

static struct pci_ops xilinx_pcie_ops = {

	.read  = xilinx_pcie_read_config,

	.write = xilinx_pcie_write_config,

	.map_bus = xilinx_pcie_map_bus,

	.read	= pci_generic_config_read,

	.write	= pci_generic_config_write,

};



/* MSI functions */