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Commit 0187d321 authored by Niklas Söderlund's avatar Niklas Söderlund Committed by Geert Uytterhoeven
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clk: renesas: r8a7795: Add CSI2 clocks 



Signed-off-by: default avatarNiklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Signed-off-by: default avatarGeert Uytterhoeven <geert+renesas@glider.be>
parent 2066390a

drivers/clk/renesas/r8a7795-cpg-mssr.c

+5 −0
Original line number Diff line number Diff line
@@ -120,6 +120,7 @@ static const struct cpg_core_clk r8a7795_core_clks[] __initconst = { 
	DEF_DIV6P1("mso",       R8A7795_CLK_MSO,   CLK_PLL1_DIV4, 0x014),

	DEF_DIV6P1("hdmi",      R8A7795_CLK_HDMI,  CLK_PLL1_DIV2, 0x250),

	DEF_DIV6P1("canfd",     R8A7795_CLK_CANFD, CLK_PLL1_DIV4, 0x244),

	DEF_DIV6P1("csi0",      R8A7795_CLK_CSI0,  CLK_PLL1_DIV4, 0x00c),



	DEF_DIV6_RO("osc",      R8A7795_CLK_OSC,   CLK_EXTAL, CPG_RCKCR, 8),

	DEF_DIV6_RO("r_int",    CLK_RINT,          CLK_EXTAL, CPG_RCKCR, 32),
@@ -190,6 +191,10 @@ static const struct mssr_mod_clk r8a7795_mod_clks[] __initconst = { 
	DEF_MOD("ehci1",		 702,	R8A7795_CLK_S3D4),

	DEF_MOD("ehci0",		 703,	R8A7795_CLK_S3D4),

	DEF_MOD("hsusb",		 704,	R8A7795_CLK_S3D4),

	DEF_MOD("csi21",		 713,	R8A7795_CLK_CSI0),

	DEF_MOD("csi20",		 714,	R8A7795_CLK_CSI0),

	DEF_MOD("csi41",		 715,	R8A7795_CLK_CSI0),

	DEF_MOD("csi40",		 716,	R8A7795_CLK_CSI0),

	DEF_MOD("du3",			 721,	R8A7795_CLK_S2D1),

	DEF_MOD("du2",			 722,	R8A7795_CLK_S2D1),

	DEF_MOD("du1",			 723,	R8A7795_CLK_S2D1),