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Commit 009722a2 authored by David S. Miller's avatar David S. Miller
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Merge branch 'hisilicon-mdio-femac'



Dongpo Li says:

====================
Add Hisilicon MDIO bus driver and FEMAC driver

This patch set adds a Hisilicon MDIO bus driver and
a Fast Ethernet MAC(FEMAC) driver.
We also abstract a general interface "of_phy_get_and_connect"
for PHY connect. User will have no bother with getting
"phy-mode" and "phy-handle" any more.

Changes in v1:
- Pass private data structure instead of struct mii_bus
  in MDIO read and write operation.
- Return the error which devm_clk_get() gives when MDIO probe.
- Leave the clock unprepared and disabled on error when MDIO probe.
- Abstract a general interface "of_phy_get_and_connect" for PHY connect.
- Remove the "_reset" suffixes in "reset-names" property.
- Enable tx per-packet interrupt when tx fifo full.
- Remove pointless compatible and add SoC specific compatible.
- Declare only one clock in MAC dts documentation.
- Add standard unit suffixes for "phy-reset-delays".
- Use a smaller NAPI poll weight 16 for our Fast Ethernet MAC.
- Use phy_ethtool_{get|set}_link_ksettings for ethtool ops.
- Use phydev from struct net_device in MAC driver.
====================

Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parents 8d8836d4 542ae60a
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Hisilicon Fast Ethernet MDIO Controller interface

Required properties:
- compatible: should be "hisilicon,hisi-femac-mdio".
- reg: address and length of the register set for the device.
- clocks: A phandle to the reference clock for this device.

- PHY subnode: inherits from phy binding [1]
[1] Documentation/devicetree/bindings/net/phy.txt

Example:
mdio: mdio@10091100 {
	compatible = "hisilicon,hisi-femac-mdio";
	reg = <0x10091100 0x10>;
	clocks = <&crg HI3516CV300_MDIO_CLK>;
	#address-cells = <1>;
	#size-cells = <0>;

	phy0: phy@1 {
		reg = <1>;
	};
};
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Hisilicon Fast Ethernet MAC controller

Required properties:
- compatible: should contain one of the following version strings:
	* "hisilicon,hisi-femac-v1"
	* "hisilicon,hisi-femac-v2"
	and the soc string "hisilicon,hi3516cv300-femac".
- reg: specifies base physical address(s) and size of the device registers.
  The first region is the MAC core register base and size.
  The second region is the global MAC control register.
- interrupts: should contain the MAC interrupt.
- clocks: A phandle to the MAC main clock.
- resets: should contain the phandle to the MAC reset signal(required) and
	the PHY reset signal(optional).
- reset-names: should contain the reset signal name "mac"(required)
	and "phy"(optional).
- mac-address: see ethernet.txt [1].
- phy-mode: see ethernet.txt [1].
- phy-handle: see ethernet.txt [1].
- hisilicon,phy-reset-delays-us: triplet of delays if PHY reset signal given.
	The 1st cell is reset pre-delay in micro seconds.
	The 2nd cell is reset pulse in micro seconds.
	The 3rd cell is reset post-delay in micro seconds.

[1] Documentation/devicetree/bindings/net/ethernet.txt

Example:
	hisi_femac: ethernet@10090000 {
		compatible = "hisilicon,hi3516cv300-femac","hisilicon,hisi-femac-v2";
		reg = <0x10090000 0x1000>,<0x10091300 0x200>;
		interrupts = <12>;
		clocks = <&crg HI3518EV200_ETH_CLK>;
		resets = <&crg 0xec 0>,<&crg 0xec 3>;
		reset-names = "mac","phy";
		mac-address = [00 00 00 00 00 00];
		phy-mode = "mii";
		phy-handle = <&phy0>;
		hisilicon,phy-reset-delays-us = <10000 20000 20000>;
	};
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@@ -23,6 +23,18 @@ config HIX5HD2_GMAC
	help
	  This selects the hix5hd2 mac family network device.

config HISI_FEMAC
	tristate "Hisilicon Fast Ethernet MAC device support"
	depends on HAS_IOMEM
	select PHYLIB
	select RESET_CONTROLLER
	help
	  This selects the Hisilicon Fast Ethernet MAC device(FEMAC).
	  The FEMAC receives and transmits data over Ethernet
	  ports at 10/100 Mbps in full-duplex or half-duplex mode.
	  The FEMAC exchanges data with the CPU, and supports
	  the energy efficient Ethernet (EEE).

config HIP04_ETH
	tristate "HISILICON P04 Ethernet support"
	depends on HAS_IOMEM	# For MFD_SYSCON
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@@ -6,3 +6,4 @@ obj-$(CONFIG_HIX5HD2_GMAC) += hix5hd2_gmac.o
obj-$(CONFIG_HIP04_ETH) += hip04_eth.o
obj-$(CONFIG_HNS_MDIO) += hns_mdio.o
obj-$(CONFIG_HNS) += hns/
obj-$(CONFIG_HISI_FEMAC) += hisi_femac.o
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