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Commit 008c3422 authored by Alexander Duyck's avatar Alexander Duyck Committed by David S. Miller
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igb: update the approach taken to acquiring and releasing the phy lock



The current approach is just using a ?: type mechanism to set the phy
locking bit.  This if fine for now but limits us to only 2.  Switch to a
nested if statement for future compatiblity with more than 2 phys.

Signed-off-by: default avatarAlexander Duyck <alexander.h.duyck@intel.com>
Signed-off-by: default avatarJeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 70d92f86
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+7 −4
Original line number Diff line number Diff line
@@ -240,9 +240,10 @@ static s32 igb_get_invariants_82575(struct e1000_hw *hw)
 **/
static s32 igb_acquire_phy_82575(struct e1000_hw *hw)
{
	u16 mask;
	u16 mask = E1000_SWFW_PHY0_SM;

	mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
	if (hw->bus.func == E1000_FUNC_1)
		mask = E1000_SWFW_PHY1_SM;

	return igb_acquire_swfw_sync_82575(hw, mask);
}
@@ -256,9 +257,11 @@ static s32 igb_acquire_phy_82575(struct e1000_hw *hw)
 **/
static void igb_release_phy_82575(struct e1000_hw *hw)
{
	u16 mask;
	u16 mask = E1000_SWFW_PHY0_SM;

	if (hw->bus.func == E1000_FUNC_1)
		mask = E1000_SWFW_PHY1_SM;

	mask = hw->bus.func ? E1000_SWFW_PHY1_SM : E1000_SWFW_PHY0_SM;
	igb_release_swfw_sync_82575(hw, mask);
}