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Commit 0086fc21 authored by ernest.zhang's avatar ernest.zhang Committed by Ulf Hansson
Browse files

mmc: sdhci: Add support for O2 hardware tuning 



Add hardware tuning function instead of software tuning because O2/Bayhub
SD host controller support hardware tuning.

Signed-off-by: default avatarernest.zhang <ernest.zhang@bayhubtech.com>
Acked-by: default avatarAdrian Hunter <adrian.hunter@intel.com>
Signed-off-by: default avatarUlf Hansson <ulf.hansson@linaro.org>
parent 6663c419

drivers/mmc/host/sdhci-pci-o2micro.c

+81 −0
Original line number Diff line number Diff line
@@ -17,6 +17,9 @@ 
 */



#include <linux/pci.h>

#include <linux/mmc/host.h>

#include <linux/mmc/mmc.h>

#include <linux/delay.h>



#include "sdhci.h"

#include "sdhci-pci.h"
@@ -55,6 +58,82 @@ 


#define O2_SD_VENDOR_SETTING	0x110

#define O2_SD_VENDOR_SETTING2	0x1C8

#define O2_SD_HW_TUNING_DISABLE	BIT(4)



static void sdhci_o2_set_tuning_mode(struct sdhci_host *host)

{

	u16 reg;



	/* enable hardware tuning */

	reg = sdhci_readw(host, O2_SD_VENDOR_SETTING);

	reg &= ~O2_SD_HW_TUNING_DISABLE;

	sdhci_writew(host, reg, O2_SD_VENDOR_SETTING);

}



static void __sdhci_o2_execute_tuning(struct sdhci_host *host, u32 opcode)

{

	int i;



	sdhci_send_tuning(host, MMC_SEND_TUNING_BLOCK_HS200);



	for (i = 0; i < 150; i++) {

		u16 ctrl = sdhci_readw(host, SDHCI_HOST_CONTROL2);



		if (!(ctrl & SDHCI_CTRL_EXEC_TUNING)) {

			if (ctrl & SDHCI_CTRL_TUNED_CLK) {

				host->tuning_done = true;

				return;

			}

			pr_warn("%s: HW tuning failed !\n",

				mmc_hostname(host->mmc));

			break;

		}



		mdelay(1);

	}



	pr_info("%s: Tuning failed, falling back to fixed sampling clock\n",

		mmc_hostname(host->mmc));

	sdhci_reset_tuning(host);

}



static int sdhci_o2_execute_tuning(struct mmc_host *mmc, u32 opcode)

{

	struct sdhci_host *host = mmc_priv(mmc);

	int current_bus_width = 0;



	/*

	 * This handler only implements the eMMC tuning that is specific to

	 * this controller.  Fall back to the standard method for other TIMING.

	 */

	if (host->timing != MMC_TIMING_MMC_HS200)

		return sdhci_execute_tuning(mmc, opcode);



	if (WARN_ON(opcode != MMC_SEND_TUNING_BLOCK_HS200))

		return -EINVAL;



	/*

	 * o2 sdhci host didn't support 8bit emmc tuning

	 */

	if (mmc->ios.bus_width == MMC_BUS_WIDTH_8) {

		current_bus_width = mmc->ios.bus_width;

		sdhci_set_bus_width(host, MMC_BUS_WIDTH_4);

	}



	sdhci_o2_set_tuning_mode(host);



	sdhci_start_tuning(host);



	__sdhci_o2_execute_tuning(host, opcode);



	sdhci_end_tuning(host);



	if (current_bus_width == MMC_BUS_WIDTH_8)

		sdhci_set_bus_width(host, current_bus_width);



	host->flags &= ~SDHCI_HS400_TUNING;

	return 0;

}



static void o2_pci_set_baseclk(struct sdhci_pci_chip *chip, u32 value)

{
@@ -215,6 +294,8 @@ int sdhci_pci_o2_probe_slot(struct sdhci_pci_slot *slot) 
			}

		}



		host->mmc_host_ops.execute_tuning = sdhci_o2_execute_tuning;



		if (chip->pdev->device != PCI_DEVICE_ID_O2_FUJIN2)

			break;

		/* set dll watch dog timer */

drivers/mmc/host/sdhci.c

+3 −1
Original line number Diff line number Diff line
@@ -1029,6 +1029,8 @@ static void sdhci_set_transfer_mode(struct sdhci_host *host, 
	if (data == NULL) {

		if (host->quirks2 &

			SDHCI_QUIRK2_CLEAR_TRANSFERMODE_REG_BEFORE_CMD) {

			/* must not clear SDHCI_TRANSFER_MODE when tuning */

			if (cmd->opcode != MMC_SEND_TUNING_BLOCK_HS200)

				sdhci_writew(host, 0x0, SDHCI_TRANSFER_MODE);

		} else {

		/* clear Auto CMD settings for no data CMDs */