Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit ffb17742 authored by Adrian Salido-Moreno's avatar Adrian Salido-Moreno Committed by Gerrit - the friendly Code Review server
Browse files

msm: mdss: dsi: use right mask to confirm dma transfer done 



When dma tx timeout happens, the internal check to verify state of
hardware is actually checking for DMA interrupt enabled bit instead of
the actual state of DMA done.

Change-Id: I2c03e3e405289c223358b82e37e49203d0d0978b
Signed-off-by: default avatarAdrian Salido-Moreno <adrianm@codeaurora.org>
parent 3a88ff89

drivers/video/msm/mdss/mdss_dsi_host.c

+10 −11
Original line number Diff line number Diff line
@@ -1741,28 +1741,27 @@ static int mdss_dsi_cmd_dma_tx(struct mdss_dsi_ctrl_pdata *ctrl, 


	ret = wait_for_completion_timeout(&ctrl->dma_comp,

				msecs_to_jiffies(DMA_TX_TIMEOUT));



	if (ret <= 0) {

		u32 reg_val, status, mask;

	if (ret == 0) {

		u32 reg_val, status;



		reg_val = MIPI_INP(ctrl->ctrl_base + 0x0110);/* DSI_INTR_CTRL */

		mask = reg_val & DSI_INTR_CMD_DMA_DONE_MASK;

		status = mask & reg_val;

		status = reg_val & DSI_INTR_CMD_DMA_DONE;

		if (status) {

			pr_warn("dma tx done but irq not triggered\n");

			reg_val &= DSI_INTR_MASK_ALL;

			/* clear CMD DMA isr only */

			reg_val |= DSI_INTR_CMD_DMA_DONE;

			MIPI_OUTP(ctrl->ctrl_base + 0x0110, reg_val);

			mdss_dsi_disable_irq_nosync(ctrl, DSI_MDP_TERM);

			mdss_dsi_disable_irq_nosync(ctrl, DSI_CMD_TERM);

			complete(&ctrl->dma_comp);

			ret = 1;



			pr_warn("%s: dma tx done but irq not triggered\n",

				__func__);

		} else {

			ret = -ETIMEDOUT;

		}

	}



	if (ret == 0)

		ret = -ETIMEDOUT;

	else

	if (!IS_ERR_VALUE(ret))

		ret = tp->len;



	if (mctrl && mctrl->dma_addr) {