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Commit ff7c61dc authored by Patrick Daly's avatar Patrick Daly Committed by Puja Gupta
Browse files

ARM: dts: msm: Fix interrupt-map property for msm8996 



The length of interrupt-map property depends on the address-cells and
interrupt-cells properties of the interrupt controller referred to by
the phandle. The size of the address-cells property was changed in

ARM: dts: msm: Add GIC ITS extensions for 8996

Add support for ITS and LPI interrupts.
Signed-off-by: default avatarHanumant Singh <hanumant@codeaurora.org>

Modify the corresponding property for pcie appropriately

Change-Id: Ia0d6caa0709f9dfbcb3c73229b8de8a6c12d5ca1
Signed-off-by: default avatarPatrick Daly <pdaly@codeaurora.org>
Signed-off-by: default avatarPuja Gupta <pujag@codeaurora.org>
parent c51ea2bb

arch/arm/boot/dts/qcom/msm8996.dtsi

+132 −132
Original line number Original line Diff line number Diff line
@@ -1140,50 +1140,50 @@ 
				39 40 41 42 43>;

				39 40 41 42 43>;

		#interrupt-cells = <1>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0x0 0x0 0x0 0xffffffff>;

		interrupt-map-mask = <0x0 0x0 0x0 0xffffffff>;

		interrupt-map = <0x0 0x0 0x0 0 &intc 0 405 0

		interrupt-map = <0x0 0x0 0x0 0 &intc 0 0 405 0

				0x0 0x0 0x0 1 &intc 0 244 0

				0x0 0x0 0x0 1 &intc 0 0 244 0

				0x0 0x0 0x0 2 &intc 0 245 0

				0x0 0x0 0x0 2 &intc 0 0 245 0

				0x0 0x0 0x0 3 &intc 0 247 0

				0x0 0x0 0x0 3 &intc 0 0 247 0

				0x0 0x0 0x0 4 &intc 0 248 0

				0x0 0x0 0x0 4 &intc 0 0 248 0

				0x0 0x0 0x0 5 &intc 0 249 0

				0x0 0x0 0x0 5 &intc 0 0 249 0

				0x0 0x0 0x0 6 &intc 0 250 0

				0x0 0x0 0x0 6 &intc 0 0 250 0

				0x0 0x0 0x0 7 &intc 0 251 0

				0x0 0x0 0x0 7 &intc 0 0 251 0

				0x0 0x0 0x0 8 &intc 0 252 0

				0x0 0x0 0x0 8 &intc 0 0 252 0

				0x0 0x0 0x0 9 &intc 0 253 0

				0x0 0x0 0x0 9 &intc 0 0 253 0

				0x0 0x0 0x0 10 &intc 0 254 0

				0x0 0x0 0x0 10 &intc 0 0 254 0

				0x0 0x0 0x0 11 &intc 0 255 0

				0x0 0x0 0x0 11 &intc 0 0 255 0

				0x0 0x0 0x0 12 &intc 0 512 0

				0x0 0x0 0x0 12 &intc 0 0 512 0

				0x0 0x0 0x0 13 &intc 0 513 0

				0x0 0x0 0x0 13 &intc 0 0 513 0

				0x0 0x0 0x0 14 &intc 0 514 0

				0x0 0x0 0x0 14 &intc 0 0 514 0

				0x0 0x0 0x0 15 &intc 0 515 0

				0x0 0x0 0x0 15 &intc 0 0 515 0

				0x0 0x0 0x0 16 &intc 0 516 0

				0x0 0x0 0x0 16 &intc 0 0 516 0

				0x0 0x0 0x0 17 &intc 0 517 0

				0x0 0x0 0x0 17 &intc 0 0 517 0

				0x0 0x0 0x0 18 &intc 0 518 0

				0x0 0x0 0x0 18 &intc 0 0 518 0

				0x0 0x0 0x0 19 &intc 0 519 0

				0x0 0x0 0x0 19 &intc 0 0 519 0

				0x0 0x0 0x0 20 &intc 0 520 0

				0x0 0x0 0x0 20 &intc 0 0 520 0

				0x0 0x0 0x0 21 &intc 0 521 0

				0x0 0x0 0x0 21 &intc 0 0 521 0

				0x0 0x0 0x0 22 &intc 0 522 0

				0x0 0x0 0x0 22 &intc 0 0 522 0

				0x0 0x0 0x0 23 &intc 0 523 0

				0x0 0x0 0x0 23 &intc 0 0 523 0

				0x0 0x0 0x0 24 &intc 0 524 0

				0x0 0x0 0x0 24 &intc 0 0 524 0

				0x0 0x0 0x0 25 &intc 0 525 0

				0x0 0x0 0x0 25 &intc 0 0 525 0

				0x0 0x0 0x0 26 &intc 0 526 0

				0x0 0x0 0x0 26 &intc 0 0 526 0

				0x0 0x0 0x0 27 &intc 0 527 0

				0x0 0x0 0x0 27 &intc 0 0 527 0

				0x0 0x0 0x0 28 &intc 0 528 0

				0x0 0x0 0x0 28 &intc 0 0 528 0

				0x0 0x0 0x0 29 &intc 0 529 0

				0x0 0x0 0x0 29 &intc 0 0 529 0

				0x0 0x0 0x0 30 &intc 0 530 0

				0x0 0x0 0x0 30 &intc 0 0 530 0

				0x0 0x0 0x0 31 &intc 0 531 0

				0x0 0x0 0x0 31 &intc 0 0 531 0

				0x0 0x0 0x0 32 &intc 0 532 0

				0x0 0x0 0x0 32 &intc 0 0 532 0

				0x0 0x0 0x0 33 &intc 0 533 0

				0x0 0x0 0x0 33 &intc 0 0 533 0

				0x0 0x0 0x0 34 &intc 0 534 0

				0x0 0x0 0x0 34 &intc 0 0 534 0

				0x0 0x0 0x0 35 &intc 0 535 0

				0x0 0x0 0x0 35 &intc 0 0 535 0

				0x0 0x0 0x0 36 &intc 0 536 0

				0x0 0x0 0x0 36 &intc 0 0 536 0

				0x0 0x0 0x0 37 &intc 0 537 0

				0x0 0x0 0x0 37 &intc 0 0 537 0

				0x0 0x0 0x0 38 &intc 0 538 0

				0x0 0x0 0x0 38 &intc 0 0 538 0

				0x0 0x0 0x0 39 &intc 0 539 0

				0x0 0x0 0x0 39 &intc 0 0 539 0

				0x0 0x0 0x0 40 &intc 0 540 0

				0x0 0x0 0x0 40 &intc 0 0 540 0

				0x0 0x0 0x0 41 &intc 0 541 0

				0x0 0x0 0x0 41 &intc 0 0 541 0

				0x0 0x0 0x0 42 &intc 0 542 0

				0x0 0x0 0x0 42 &intc 0 0 542 0

				0x0 0x0 0x0 43 &intc 0 543 0>;

				0x0 0x0 0x0 43 &intc 0 0 543 0>;





		interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d",

		interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d",

				"int_pls_pme", "int_pme_legacy", "int_pls_err",

				"int_pls_pme", "int_pme_legacy", "int_pls_err",
@@ -1294,50 +1294,50 @@ 
				39 40 41 42 43>;

				39 40 41 42 43>;

		#interrupt-cells = <1>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0x0 0x0 0x0 0xffffffff>;

		interrupt-map-mask = <0x0 0x0 0x0 0xffffffff>;

		interrupt-map = <0x0 0x0 0x0 0 &intc 0 413 0

		interrupt-map = <0x0 0x0 0x0 0 &intc 0 0 413 0

				0x0 0x0 0x0 1 &intc 0 272 0

				0x0 0x0 0x0 1 &intc 0 0 272 0

				0x0 0x0 0x0 2 &intc 0 273 0

				0x0 0x0 0x0 2 &intc 0 0 273 0

				0x0 0x0 0x0 3 &intc 0 274 0

				0x0 0x0 0x0 3 &intc 0 0 274 0

				0x0 0x0 0x0 4 &intc 0 275 0

				0x0 0x0 0x0 4 &intc 0 0 275 0

				0x0 0x0 0x0 5 &intc 0 276 0

				0x0 0x0 0x0 5 &intc 0 0 276 0

				0x0 0x0 0x0 6 &intc 0 277 0

				0x0 0x0 0x0 6 &intc 0 0 277 0

				0x0 0x0 0x0 7 &intc 0 278 0

				0x0 0x0 0x0 7 &intc 0 0 278 0

				0x0 0x0 0x0 8 &intc 0 279 0

				0x0 0x0 0x0 8 &intc 0 0 279 0

				0x0 0x0 0x0 9 &intc 0 280 0

				0x0 0x0 0x0 9 &intc 0 0 280 0

				0x0 0x0 0x0 10 &intc 0 281 0

				0x0 0x0 0x0 10 &intc 0 0 281 0

				0x0 0x0 0x0 11 &intc 0 282 0

				0x0 0x0 0x0 11 &intc 0 0 282 0

				0x0 0x0 0x0 12 &intc 0 544 0

				0x0 0x0 0x0 12 &intc 0 0 544 0

				0x0 0x0 0x0 13 &intc 0 545 0

				0x0 0x0 0x0 13 &intc 0 0 545 0

				0x0 0x0 0x0 14 &intc 0 546 0

				0x0 0x0 0x0 14 &intc 0 0 546 0

				0x0 0x0 0x0 15 &intc 0 547 0

				0x0 0x0 0x0 15 &intc 0 0 547 0

				0x0 0x0 0x0 16 &intc 0 548 0

				0x0 0x0 0x0 16 &intc 0 0 548 0

				0x0 0x0 0x0 17 &intc 0 549 0

				0x0 0x0 0x0 17 &intc 0 0 549 0

				0x0 0x0 0x0 18 &intc 0 550 0

				0x0 0x0 0x0 18 &intc 0 0 550 0

				0x0 0x0 0x0 19 &intc 0 551 0

				0x0 0x0 0x0 19 &intc 0 0 551 0

				0x0 0x0 0x0 20 &intc 0 552 0

				0x0 0x0 0x0 20 &intc 0 0 552 0

				0x0 0x0 0x0 21 &intc 0 553 0

				0x0 0x0 0x0 21 &intc 0 0 553 0

				0x0 0x0 0x0 22 &intc 0 554 0

				0x0 0x0 0x0 22 &intc 0 0 554 0

				0x0 0x0 0x0 23 &intc 0 555 0

				0x0 0x0 0x0 23 &intc 0 0 555 0

				0x0 0x0 0x0 24 &intc 0 556 0

				0x0 0x0 0x0 24 &intc 0 0 556 0

				0x0 0x0 0x0 25 &intc 0 557 0

				0x0 0x0 0x0 25 &intc 0 0 557 0

				0x0 0x0 0x0 26 &intc 0 558 0

				0x0 0x0 0x0 26 &intc 0 0 558 0

				0x0 0x0 0x0 27 &intc 0 559 0

				0x0 0x0 0x0 27 &intc 0 0 559 0

				0x0 0x0 0x0 28 &intc 0 560 0

				0x0 0x0 0x0 28 &intc 0 0 560 0

				0x0 0x0 0x0 29 &intc 0 561 0

				0x0 0x0 0x0 29 &intc 0 0 561 0

				0x0 0x0 0x0 30 &intc 0 562 0

				0x0 0x0 0x0 30 &intc 0 0 562 0

				0x0 0x0 0x0 31 &intc 0 563 0

				0x0 0x0 0x0 31 &intc 0 0 563 0

				0x0 0x0 0x0 32 &intc 0 564 0

				0x0 0x0 0x0 32 &intc 0 0 564 0

				0x0 0x0 0x0 33 &intc 0 565 0

				0x0 0x0 0x0 33 &intc 0 0 565 0

				0x0 0x0 0x0 34 &intc 0 566 0

				0x0 0x0 0x0 34 &intc 0 0 566 0

				0x0 0x0 0x0 35 &intc 0 567 0

				0x0 0x0 0x0 35 &intc 0 0 567 0

				0x0 0x0 0x0 36 &intc 0 568 0

				0x0 0x0 0x0 36 &intc 0 0 568 0

				0x0 0x0 0x0 37 &intc 0 569 0

				0x0 0x0 0x0 37 &intc 0 0 569 0

				0x0 0x0 0x0 38 &intc 0 570 0

				0x0 0x0 0x0 38 &intc 0 0 570 0

				0x0 0x0 0x0 39 &intc 0 571 0

				0x0 0x0 0x0 39 &intc 0 0 571 0

				0x0 0x0 0x0 40 &intc 0 572 0

				0x0 0x0 0x0 40 &intc 0 0 572 0

				0x0 0x0 0x0 41 &intc 0 573 0

				0x0 0x0 0x0 41 &intc 0 0 573 0

				0x0 0x0 0x0 42 &intc 0 574 0

				0x0 0x0 0x0 42 &intc 0 0 574 0

				0x0 0x0 0x0 43 &intc 0 575 0>;

				0x0 0x0 0x0 43 &intc 0 0 575 0>;





		interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d",

		interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d",

				"int_pls_pme", "int_pme_legacy", "int_pls_err",

				"int_pls_pme", "int_pme_legacy", "int_pls_err",
@@ -1444,50 +1444,50 @@ 
				39 40 41 42 43>;

				39 40 41 42 43>;

		#interrupt-cells = <1>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0x0 0x0 0x0 0xffffffff>;

		interrupt-map-mask = <0x0 0x0 0x0 0xffffffff>;

		interrupt-map = <0x0 0x0 0x0 0 &intc 0 421 0

		interrupt-map = <0x0 0x0 0x0 0 &intc 0 0 421 0

				0x0 0x0 0x0 1 &intc 0 142 0

				0x0 0x0 0x0 1 &intc 0 0 142 0

				0x0 0x0 0x0 2 &intc 0 143 0

				0x0 0x0 0x0 2 &intc 0 0 143 0

				0x0 0x0 0x0 3 &intc 0 144 0

				0x0 0x0 0x0 3 &intc 0 0 144 0

				0x0 0x0 0x0 4 &intc 0 145 0

				0x0 0x0 0x0 4 &intc 0 0 145 0

				0x0 0x0 0x0 5 &intc 0 146 0

				0x0 0x0 0x0 5 &intc 0 0 146 0

				0x0 0x0 0x0 6 &intc 0 147 0

				0x0 0x0 0x0 6 &intc 0 0 147 0

				0x0 0x0 0x0 7 &intc 0 148 0

				0x0 0x0 0x0 7 &intc 0 0 148 0

				0x0 0x0 0x0 8 &intc 0 149 0

				0x0 0x0 0x0 8 &intc 0 0 149 0

				0x0 0x0 0x0 9 &intc 0 260 0

				0x0 0x0 0x0 9 &intc 0 0 260 0

				0x0 0x0 0x0 10 &intc 0 261 0

				0x0 0x0 0x0 10 &intc 0 0 261 0

				0x0 0x0 0x0 11 &intc 0 262 0

				0x0 0x0 0x0 11 &intc 0 0 262 0

				0x0 0x0 0x0 12 &intc 0 576 0

				0x0 0x0 0x0 12 &intc 0 0 576 0

				0x0 0x0 0x0 13 &intc 0 577 0

				0x0 0x0 0x0 13 &intc 0 0 577 0

				0x0 0x0 0x0 14 &intc 0 578 0

				0x0 0x0 0x0 14 &intc 0 0 578 0

				0x0 0x0 0x0 15 &intc 0 579 0

				0x0 0x0 0x0 15 &intc 0 0 579 0

				0x0 0x0 0x0 16 &intc 0 580 0

				0x0 0x0 0x0 16 &intc 0 0 580 0

				0x0 0x0 0x0 17 &intc 0 581 0

				0x0 0x0 0x0 17 &intc 0 0 581 0

				0x0 0x0 0x0 18 &intc 0 582 0

				0x0 0x0 0x0 18 &intc 0 0 582 0

				0x0 0x0 0x0 19 &intc 0 583 0

				0x0 0x0 0x0 19 &intc 0 0 583 0

				0x0 0x0 0x0 20 &intc 0 584 0

				0x0 0x0 0x0 20 &intc 0 0 584 0

				0x0 0x0 0x0 21 &intc 0 585 0

				0x0 0x0 0x0 21 &intc 0 0 585 0

				0x0 0x0 0x0 22 &intc 0 586 0

				0x0 0x0 0x0 22 &intc 0 0 586 0

				0x0 0x0 0x0 23 &intc 0 587 0

				0x0 0x0 0x0 23 &intc 0 0 587 0

				0x0 0x0 0x0 24 &intc 0 588 0

				0x0 0x0 0x0 24 &intc 0 0 588 0

				0x0 0x0 0x0 25 &intc 0 589 0

				0x0 0x0 0x0 25 &intc 0 0 589 0

				0x0 0x0 0x0 26 &intc 0 590 0

				0x0 0x0 0x0 26 &intc 0 0 590 0

				0x0 0x0 0x0 27 &intc 0 591 0

				0x0 0x0 0x0 27 &intc 0 0 591 0

				0x0 0x0 0x0 28 &intc 0 592 0

				0x0 0x0 0x0 28 &intc 0 0 592 0

				0x0 0x0 0x0 29 &intc 0 593 0

				0x0 0x0 0x0 29 &intc 0 0 593 0

				0x0 0x0 0x0 30 &intc 0 594 0

				0x0 0x0 0x0 30 &intc 0 0 594 0

				0x0 0x0 0x0 31 &intc 0 595 0

				0x0 0x0 0x0 31 &intc 0 0 595 0

				0x0 0x0 0x0 32 &intc 0 596 0

				0x0 0x0 0x0 32 &intc 0 0 596 0

				0x0 0x0 0x0 33 &intc 0 597 0

				0x0 0x0 0x0 33 &intc 0 0 597 0

				0x0 0x0 0x0 34 &intc 0 598 0

				0x0 0x0 0x0 34 &intc 0 0 598 0

				0x0 0x0 0x0 35 &intc 0 599 0

				0x0 0x0 0x0 35 &intc 0 0 599 0

				0x0 0x0 0x0 36 &intc 0 600 0

				0x0 0x0 0x0 36 &intc 0 0 600 0

				0x0 0x0 0x0 37 &intc 0 601 0

				0x0 0x0 0x0 37 &intc 0 0 601 0

				0x0 0x0 0x0 38 &intc 0 602 0

				0x0 0x0 0x0 38 &intc 0 0 602 0

				0x0 0x0 0x0 39 &intc 0 603 0

				0x0 0x0 0x0 39 &intc 0 0 603 0

				0x0 0x0 0x0 40 &intc 0 604 0

				0x0 0x0 0x0 40 &intc 0 0 604 0

				0x0 0x0 0x0 41 &intc 0 605 0

				0x0 0x0 0x0 41 &intc 0 0 605 0

				0x0 0x0 0x0 42 &intc 0 606 0

				0x0 0x0 0x0 42 &intc 0 0 606 0

				0x0 0x0 0x0 43 &intc 0 607 0>;

				0x0 0x0 0x0 43 &intc 0 0 607 0>;





		interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d",

		interrupt-names = "int_msi", "int_a", "int_b", "int_c", "int_d",

				"int_pls_pme", "int_pme_legacy", "int_pls_err",

				"int_pls_pme", "int_pme_legacy", "int_pls_err",