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Commit ff3b86d0 authored by Timothy Pearson's avatar Timothy Pearson Committed by Sasha Levin
Browse files

drm/ast: Fix incorrect register check for DRAM width 



[ Upstream commit 2d02b8bdba322b527c5f5168ce1ca10c2d982a78 ]

During DRAM initialization on certain ASpeed devices, an incorrect
bit (bit 10) was checked in the "SDRAM Bus Width Status" register
to determine DRAM width.

Query bit 6 instead in accordance with the Aspeed AST2050 datasheet v1.05.

Signed-off-by: default avatarTimothy Pearson <tpearson@raptorengineeringinc.com>
Cc: stable@vger.kernel.org
Signed-off-by: default avatarDave Airlie <airlied@redhat.com>
Signed-off-by: default avatarSasha Levin <sasha.levin@oracle.com>
parent b2d914b2

drivers/gpu/drm/ast/ast_main.c

+1 −1
Original line number Diff line number Diff line
@@ -227,7 +227,7 @@ static int ast_get_dram_info(struct drm_device *dev) 
	} while (ast_read32(ast, 0x10000) != 0x01);

	data = ast_read32(ast, 0x10004);



	if (data & 0x400)

	if (data & 0x40)

		ast->dram_bus_width = 16;

	else

		ast->dram_bus_width = 32;