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Commit fef40b23 authored by Stephen Warren's avatar Stephen Warren
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Merge commit 'xceiv-for-v3.7' into for-3.7/cleanup2

parents f49540d1 363366cf

Documentation/devicetree/bindings/usb/twlxxxx-usb.txt

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USB COMPARATOR OF TWL CHIPS



TWL6030 USB COMPARATOR

 - compatible : Should be "ti,twl6030-usb"

 - interrupts : Two interrupt numbers to the cpu should be specified. First

   interrupt number is the otg interrupt number that raises ID interrupts when

   the controller has to act as host and the second interrupt number is the

   usb interrupt number that raises VBUS interrupts when the controller has to

   act as device

 - usb-supply : phandle to the regulator device tree node. It should be vusb

   if it is twl6030 or ldousb if it is twl6025 subclass.



twl6030-usb {

	compatible = "ti,twl6030-usb";

	interrupts = < 4 10 >;

};



Board specific device node entry

&twl6030-usb {

	usb-supply = <&vusb>;

};



TWL4030 USB PHY AND COMPARATOR

 - compatible : Should be "ti,twl4030-usb"

 - interrupts : The interrupt numbers to the cpu should be specified. First

   interrupt number is the otg interrupt number that raises ID interrupts

   and VBUS interrupts. The second interrupt number is optional.

 - <supply-name>-supply : phandle to the regulator device tree node.

   <supply-name> should be vusb1v5, vusb1v8 and vusb3v1

 - usb_mode : The mode used by the phy to connect to the controller. "1"

   specifies "ULPI" mode and "2" specifies "CEA2011_3PIN" mode.



twl4030-usb {

	compatible = "ti,twl4030-usb";

	interrupts = < 10 4 >;

	usb1v5-supply = <&vusb1v5>;

	usb1v8-supply = <&vusb1v8>;

	usb3v1-supply = <&vusb3v1>;

	usb_mode = <1>;

};

Documentation/devicetree/bindings/usb/usb-phy.txt

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USB PHY



OMAP USB2 PHY



Required properties:

 - compatible: Should be "ti,omap-usb2"

 - reg : Address and length of the register set for the device. Also

add the address of control module dev conf register until a driver for

control module is added



This is usually a subnode of ocp2scp to which it is connected.



usb2phy@4a0ad080 {

	compatible = "ti,omap-usb2";

	reg = <0x4a0ad080 0x58>,

	      <0x4a002300 0x4>;

};

arch/arm/mach-omap2/board-omap3evm.c

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@@ -32,6 +32,7 @@ 
#include <linux/spi/ads7846.h>

#include <linux/i2c/twl.h>

#include <linux/usb/otg.h>

#include <linux/usb/nop-usb-xceiv.h>

#include <linux/smsc911x.h>



#include <linux/wl12xx.h>

arch/arm/mach-omap2/omap_phy_internal.c

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@@ -31,144 +31,6 @@ 
#include <plat/usb.h>

#include "control.h"



/* OMAP control module register for UTMI PHY */

#define CONTROL_DEV_CONF		0x300

#define PHY_PD				0x1



#define USBOTGHS_CONTROL		0x33c

#define	AVALID				BIT(0)

#define	BVALID				BIT(1)

#define	VBUSVALID			BIT(2)

#define	SESSEND				BIT(3)

#define	IDDIG				BIT(4)



static struct clk *phyclk, *clk48m, *clk32k;

static void __iomem *ctrl_base;

static int usbotghs_control;



int omap4430_phy_init(struct device *dev)

{

	ctrl_base = ioremap(OMAP443X_SCM_BASE, SZ_1K);

	if (!ctrl_base) {

		pr_err("control module ioremap failed\n");

		return -ENOMEM;

	}

	/* Power down the phy */

	__raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);



	if (!dev) {

		iounmap(ctrl_base);

		return 0;

	}



	phyclk = clk_get(dev, "ocp2scp_usb_phy_ick");

	if (IS_ERR(phyclk)) {

		dev_err(dev, "cannot clk_get ocp2scp_usb_phy_ick\n");

		iounmap(ctrl_base);

		return PTR_ERR(phyclk);

	}



	clk48m = clk_get(dev, "ocp2scp_usb_phy_phy_48m");

	if (IS_ERR(clk48m)) {

		dev_err(dev, "cannot clk_get ocp2scp_usb_phy_phy_48m\n");

		clk_put(phyclk);

		iounmap(ctrl_base);

		return PTR_ERR(clk48m);

	}



	clk32k = clk_get(dev, "usb_phy_cm_clk32k");

	if (IS_ERR(clk32k)) {

		dev_err(dev, "cannot clk_get usb_phy_cm_clk32k\n");

		clk_put(phyclk);

		clk_put(clk48m);

		iounmap(ctrl_base);

		return PTR_ERR(clk32k);

	}

	return 0;

}



int omap4430_phy_set_clk(struct device *dev, int on)

{

	static int state;



	if (on && !state) {

		/* Enable the phy clocks */

		clk_enable(phyclk);

		clk_enable(clk48m);

		clk_enable(clk32k);

		state = 1;

	} else if (state) {

		/* Disable the phy clocks */

		clk_disable(phyclk);

		clk_disable(clk48m);

		clk_disable(clk32k);

		state = 0;

	}

	return 0;

}



int omap4430_phy_power(struct device *dev, int ID, int on)

{

	if (on) {

		if (ID)

			/* enable VBUS valid, IDDIG groung */

			__raw_writel(AVALID | VBUSVALID, ctrl_base +

							USBOTGHS_CONTROL);

		else

			/*

			 * Enable VBUS Valid, AValid and IDDIG

			 * high impedance

			 */

			__raw_writel(IDDIG | AVALID | VBUSVALID,

						ctrl_base + USBOTGHS_CONTROL);

	} else {

		/* Enable session END and IDIG to high impedance. */

		__raw_writel(SESSEND | IDDIG, ctrl_base +

					USBOTGHS_CONTROL);

	}

	return 0;

}



int omap4430_phy_suspend(struct device *dev, int suspend)

{

	if (suspend) {

		/* Disable the clocks */

		omap4430_phy_set_clk(dev, 0);

		/* Power down the phy */

		__raw_writel(PHY_PD, ctrl_base + CONTROL_DEV_CONF);



		/* save the context */

		usbotghs_control = __raw_readl(ctrl_base + USBOTGHS_CONTROL);

	} else {

		/* Enable the internel phy clcoks */

		omap4430_phy_set_clk(dev, 1);

		/* power on the phy */

		if (__raw_readl(ctrl_base + CONTROL_DEV_CONF) & PHY_PD) {

			__raw_writel(~PHY_PD, ctrl_base + CONTROL_DEV_CONF);

			mdelay(200);

		}



		/* restore the context */

		__raw_writel(usbotghs_control, ctrl_base + USBOTGHS_CONTROL);

	}



	return 0;

}



int omap4430_phy_exit(struct device *dev)

{

	if (ctrl_base)

		iounmap(ctrl_base);

	if (phyclk)

		clk_put(phyclk);

	if (clk48m)

		clk_put(clk48m);

	if (clk32k)

		clk_put(clk32k);



	return 0;

}



void am35x_musb_reset(void)

{

	u32	regval;

arch/arm/mach-omap2/twl-common.c

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@@ -251,11 +251,6 @@ void __init omap3_pmic_get_config(struct twl4030_platform_data *pmic_data, 


#if defined(CONFIG_ARCH_OMAP4)

static struct twl4030_usb_data omap4_usb_pdata = {

	.phy_init	= omap4430_phy_init,

	.phy_exit	= omap4430_phy_exit,

	.phy_power	= omap4430_phy_power,

	.phy_set_clock	= omap4430_phy_set_clk,

	.phy_suspend	= omap4430_phy_suspend,

};



static struct regulator_init_data omap4_vdac_idata = {