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Commit fd1122a2 authored by Matt Carlson's avatar Matt Carlson Committed by David S. Miller
Browse files

tg3: Fix 5761 NVRAM sizes 



The 5761 NVRAM sizes assigned to the nvram_size member are half as big
as they should be.  This patch corrects the NVRAM sizes and replaces
the hardcoded constants with preprocessor constants for readability.

Signed-off-by: default avatarMatt Carlson <mcarlson@broadcom.com>
Signed-off-by: default avatarMichael Chan <mchan@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent 8ef21428

drivers/net/tg3.c

+20 −11
Original line number Original line Diff line number Diff line
@@ -9894,7 +9894,7 @@ static void __devinit tg3_get_nvram_size(struct tg3 *tp) 
			return;

			return;

		}

		}

	}

	}

	tp->nvram_size = 0x80000;

	tp->nvram_size = TG3_NVRAM_SIZE_512KB;

}

}





static void __devinit tg3_get_nvram_info(struct tg3 *tp)

static void __devinit tg3_get_nvram_info(struct tg3 *tp)
@@ -10035,11 +10035,14 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) 
			tp->nvram_pagesize = 264;

			tp->nvram_pagesize = 264;

			if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 ||

			if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_1 ||

			    nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5)

			    nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_5)

				tp->nvram_size = (protect ? 0x3e200 : 0x80000);

				tp->nvram_size = (protect ? 0x3e200 :

						  TG3_NVRAM_SIZE_512KB);

			else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2)

			else if (nvcfg1 == FLASH_5755VENDOR_ATMEL_FLASH_2)

				tp->nvram_size = (protect ? 0x1f200 : 0x40000);

				tp->nvram_size = (protect ? 0x1f200 :

						  TG3_NVRAM_SIZE_256KB);

			else

			else

				tp->nvram_size = (protect ? 0x1f200 : 0x20000);

				tp->nvram_size = (protect ? 0x1f200 :

						  TG3_NVRAM_SIZE_128KB);

			break;

			break;

		case FLASH_5752VENDOR_ST_M45PE10:

		case FLASH_5752VENDOR_ST_M45PE10:

		case FLASH_5752VENDOR_ST_M45PE20:

		case FLASH_5752VENDOR_ST_M45PE20:
@@ -10049,11 +10052,17 @@ static void __devinit tg3_get_5755_nvram_info(struct tg3 *tp) 
			tp->tg3_flags2 |= TG3_FLG2_FLASH;

			tp->tg3_flags2 |= TG3_FLG2_FLASH;

			tp->nvram_pagesize = 256;

			tp->nvram_pagesize = 256;

			if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10)

			if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE10)

				tp->nvram_size = (protect ? 0x10000 : 0x20000);

				tp->nvram_size = (protect ?

						  TG3_NVRAM_SIZE_64KB :

						  TG3_NVRAM_SIZE_128KB);

			else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20)

			else if (nvcfg1 == FLASH_5752VENDOR_ST_M45PE20)

				tp->nvram_size = (protect ? 0x10000 : 0x40000);

				tp->nvram_size = (protect ?

						  TG3_NVRAM_SIZE_64KB :

						  TG3_NVRAM_SIZE_256KB);

			else

			else

				tp->nvram_size = (protect ? 0x20000 : 0x80000);

				tp->nvram_size = (protect ?

						  TG3_NVRAM_SIZE_128KB :

						  TG3_NVRAM_SIZE_512KB);

			break;

			break;

	}

	}

}

}
@@ -10147,25 +10156,25 @@ static void __devinit tg3_get_5761_nvram_info(struct tg3 *tp) 
			case FLASH_5761VENDOR_ATMEL_MDB161D:

			case FLASH_5761VENDOR_ATMEL_MDB161D:

			case FLASH_5761VENDOR_ST_A_M45PE16:

			case FLASH_5761VENDOR_ST_A_M45PE16:

			case FLASH_5761VENDOR_ST_M_M45PE16:

			case FLASH_5761VENDOR_ST_M_M45PE16:

				tp->nvram_size = 0x100000;

				tp->nvram_size = TG3_NVRAM_SIZE_2MB;

				break;

				break;

			case FLASH_5761VENDOR_ATMEL_ADB081D:

			case FLASH_5761VENDOR_ATMEL_ADB081D:

			case FLASH_5761VENDOR_ATMEL_MDB081D:

			case FLASH_5761VENDOR_ATMEL_MDB081D:

			case FLASH_5761VENDOR_ST_A_M45PE80:

			case FLASH_5761VENDOR_ST_A_M45PE80:

			case FLASH_5761VENDOR_ST_M_M45PE80:

			case FLASH_5761VENDOR_ST_M_M45PE80:

				tp->nvram_size = 0x80000;

				tp->nvram_size = TG3_NVRAM_SIZE_1MB;

				break;

				break;

			case FLASH_5761VENDOR_ATMEL_ADB041D:

			case FLASH_5761VENDOR_ATMEL_ADB041D:

			case FLASH_5761VENDOR_ATMEL_MDB041D:

			case FLASH_5761VENDOR_ATMEL_MDB041D:

			case FLASH_5761VENDOR_ST_A_M45PE40:

			case FLASH_5761VENDOR_ST_A_M45PE40:

			case FLASH_5761VENDOR_ST_M_M45PE40:

			case FLASH_5761VENDOR_ST_M_M45PE40:

				tp->nvram_size = 0x40000;

				tp->nvram_size = TG3_NVRAM_SIZE_512KB;

				break;

				break;

			case FLASH_5761VENDOR_ATMEL_ADB021D:

			case FLASH_5761VENDOR_ATMEL_ADB021D:

			case FLASH_5761VENDOR_ATMEL_MDB021D:

			case FLASH_5761VENDOR_ATMEL_MDB021D:

			case FLASH_5761VENDOR_ST_A_M45PE20:

			case FLASH_5761VENDOR_ST_A_M45PE20:

			case FLASH_5761VENDOR_ST_M_M45PE20:

			case FLASH_5761VENDOR_ST_M_M45PE20:

				tp->nvram_size = 0x20000;

				tp->nvram_size = TG3_NVRAM_SIZE_256KB;

				break;

				break;

		}

		}

	}

	}

drivers/net/tg3.h

+9 −2
Original line number Original line Diff line number Diff line
@@ -2576,6 +2576,13 @@ struct tg3 { 




	int				nvram_lock_cnt;

	int				nvram_lock_cnt;

	u32				nvram_size;

	u32				nvram_size;

#define TG3_NVRAM_SIZE_64KB		0x00010000

#define TG3_NVRAM_SIZE_128KB		0x00020000

#define TG3_NVRAM_SIZE_256KB		0x00040000

#define TG3_NVRAM_SIZE_512KB		0x00080000

#define TG3_NVRAM_SIZE_1MB		0x00100000

#define TG3_NVRAM_SIZE_2MB		0x00200000



	u32				nvram_pagesize;

	u32				nvram_pagesize;

	u32				nvram_jedecnum;

	u32				nvram_jedecnum;
@@ -2584,10 +2591,10 @@ struct tg3 { 
#define JEDEC_SAIFUN			0x4f

#define JEDEC_SAIFUN			0x4f

#define JEDEC_SST			0xbf

#define JEDEC_SST			0xbf





#define ATMEL_AT24C64_CHIP_SIZE		(64 * 1024)

#define ATMEL_AT24C64_CHIP_SIZE		TG3_NVRAM_SIZE_64KB

#define ATMEL_AT24C64_PAGE_SIZE		(32)

#define ATMEL_AT24C64_PAGE_SIZE		(32)





#define ATMEL_AT24C512_CHIP_SIZE	(512 * 1024)

#define ATMEL_AT24C512_CHIP_SIZE	TG3_NVRAM_SIZE_512KB

#define ATMEL_AT24C512_PAGE_SIZE	(128)

#define ATMEL_AT24C512_PAGE_SIZE	(128)





#define ATMEL_AT45DB0X1B_PAGE_POS	9

#define ATMEL_AT45DB0X1B_PAGE_POS	9