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Commit fc76be43 authored by Linus Torvalds's avatar Linus Torvalds
Browse files

Merge master.kernel.org:/home/rmk/linux-2.6-arm 

* master.kernel.org:/home/rmk/linux-2.6-arm:
  ARM: Fix wrong register in proc-arm6_7.S data abort handler
  ARM: 5909/1: ARM: Correct the FPSCR bits setting when raising exceptions
  ARM: 5904/1: ARM: Always generate the IT instruction when compiling for Thumb-2
  ARM: 5907/1: ARM: Fix the reset on the RealView PBX Development board
  mx35: add a missing comma in a pad definition
  mx25: make the FEC AHB clk secondary of the IPG
  mx25: fix time accounting
  mx25: properly initialize clocks
  mx25: remove unused mx25_clocks_init() argument
  i.MX25: implement secondary clocks for uarts and fec
  i.MX25: Allow secondary clocks in DEFINE_CLOCK
  ARM: MX3: Fixed typo in declared enum type name.
  MXC: Add AUDMUXv2 register decode to debugfs
  mx31ads: Provide an IRQ range to the WM835x on the 1133-EV1 module
  mx31ads: Provide a name for EXPIO interrupt chip
  mx31ads: Allow enable/disable of switchable supplies
parents 9d82d5ef 4aba098c

arch/arm/Makefile

+1 −1
Original line number Original line Diff line number Diff line
@@ -94,7 +94,7 @@ CFLAGS_ABI +=-funwind-tables 
endif

endif





ifeq ($(CONFIG_THUMB2_KERNEL),y)

ifeq ($(CONFIG_THUMB2_KERNEL),y)

AFLAGS_AUTOIT	:=$(call as-option,-Wa$(comma)-mimplicit-it=thumb,-Wa$(comma)-mauto-it)

AFLAGS_AUTOIT	:=$(call as-option,-Wa$(comma)-mimplicit-it=always,-Wa$(comma)-mauto-it)

AFLAGS_NOWARN	:=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)

AFLAGS_NOWARN	:=$(call as-option,-Wa$(comma)-mno-warn-deprecated,-Wa$(comma)-W)

CFLAGS_THUMB2	:=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN)

CFLAGS_THUMB2	:=-mthumb $(AFLAGS_AUTOIT) $(AFLAGS_NOWARN)

AFLAGS_THUMB2	:=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb

AFLAGS_THUMB2	:=$(CFLAGS_THUMB2) -Wa$(comma)-mthumb

arch/arm/mach-mx25/clock.c

+37 −21
Original line number Original line Diff line number Diff line
@@ -119,6 +119,11 @@ static unsigned long get_rate_nfc(struct clk *clk) 
	return get_rate_per(8);

	return get_rate_per(8);

}

}





static unsigned long get_rate_gpt(struct clk *clk)

{

	return get_rate_per(5);

}



static unsigned long get_rate_otg(struct clk *clk)

static unsigned long get_rate_otg(struct clk *clk)

{

{

	return 48000000; /* FIXME */

	return 48000000; /* FIXME */
@@ -144,7 +149,7 @@ static void clk_cgcr_disable(struct clk *clk) 
	__raw_writel(reg, clk->enable_reg);

	__raw_writel(reg, clk->enable_reg);

}

}





#define DEFINE_CLOCK(name, i, er, es, gr, sr)		\

#define DEFINE_CLOCK(name, i, er, es, gr, sr, s)	\

	static struct clk name = {			\

	static struct clk name = {			\

		.id		= i,			\

		.id		= i,			\

		.enable_reg	= CRM_BASE + er,	\

		.enable_reg	= CRM_BASE + er,	\
@@ -153,27 +158,30 @@ static void clk_cgcr_disable(struct clk *clk) 
		.set_rate	= sr,			\

		.set_rate	= sr,			\

		.enable		= clk_cgcr_enable,	\

		.enable		= clk_cgcr_enable,	\

		.disable	= clk_cgcr_disable,	\

		.disable	= clk_cgcr_disable,	\

		.secondary	= s,			\

	}

	}





DEFINE_CLOCK(gpt_clk,    0, CCM_CGCR0,  5, get_rate_ipg, NULL);

DEFINE_CLOCK(gpt_clk,    0, CCM_CGCR0,  5, get_rate_gpt, NULL, NULL);

DEFINE_CLOCK(cspi1_clk,  0, CCM_CGCR1,  5, get_rate_ipg, NULL);

DEFINE_CLOCK(uart_per_clk, 0, CCM_CGCR0, 15, get_rate_uart, NULL, NULL);

DEFINE_CLOCK(cspi2_clk,  0, CCM_CGCR1,  6, get_rate_ipg, NULL);

DEFINE_CLOCK(cspi1_clk,  0, CCM_CGCR1,  5, get_rate_ipg, NULL, NULL);

DEFINE_CLOCK(cspi3_clk,  0, CCM_CGCR1,  7, get_rate_ipg, NULL);

DEFINE_CLOCK(cspi2_clk,  0, CCM_CGCR1,  6, get_rate_ipg, NULL, NULL);

DEFINE_CLOCK(uart1_clk,  0, CCM_CGCR2, 14, get_rate_uart, NULL);

DEFINE_CLOCK(cspi3_clk,  0, CCM_CGCR1,  7, get_rate_ipg, NULL, NULL);

DEFINE_CLOCK(uart2_clk,  0, CCM_CGCR2, 15, get_rate_uart, NULL);

DEFINE_CLOCK(fec_ahb_clk, 0, CCM_CGCR0, 23, NULL,	 NULL, NULL);

DEFINE_CLOCK(uart3_clk,  0, CCM_CGCR2, 16, get_rate_uart, NULL);

DEFINE_CLOCK(uart1_clk,  0, CCM_CGCR2, 14, get_rate_uart, NULL, &uart_per_clk);

DEFINE_CLOCK(uart4_clk,  0, CCM_CGCR2, 17, get_rate_uart, NULL);

DEFINE_CLOCK(uart2_clk,  0, CCM_CGCR2, 15, get_rate_uart, NULL, &uart_per_clk);

DEFINE_CLOCK(uart5_clk,  0, CCM_CGCR2, 18, get_rate_uart, NULL);

DEFINE_CLOCK(uart3_clk,  0, CCM_CGCR2, 16, get_rate_uart, NULL, &uart_per_clk);

DEFINE_CLOCK(nfc_clk,    0, CCM_CGCR0,  8, get_rate_nfc, NULL);

DEFINE_CLOCK(uart4_clk,  0, CCM_CGCR2, 17, get_rate_uart, NULL, &uart_per_clk);

DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL);

DEFINE_CLOCK(uart5_clk,  0, CCM_CGCR2, 18, get_rate_uart, NULL, &uart_per_clk);

DEFINE_CLOCK(pwm1_clk,	 0, CCM_CGCR1, 31, get_rate_ipg, NULL);

DEFINE_CLOCK(nfc_clk,    0, CCM_CGCR0,  8, get_rate_nfc, NULL, NULL);

DEFINE_CLOCK(pwm2_clk,	 0, CCM_CGCR2,  0, get_rate_ipg, NULL);

DEFINE_CLOCK(usbotg_clk, 0, CCM_CGCR0, 28, get_rate_otg, NULL, NULL);

DEFINE_CLOCK(pwm3_clk,	 0, CCM_CGCR2,  1, get_rate_ipg, NULL);

DEFINE_CLOCK(pwm1_clk,	 0, CCM_CGCR1, 31, get_rate_ipg, NULL, NULL);

DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL);

DEFINE_CLOCK(pwm2_clk,	 0, CCM_CGCR2,  0, get_rate_ipg, NULL, NULL);

DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL);

DEFINE_CLOCK(pwm3_clk,	 0, CCM_CGCR2,  1, get_rate_ipg, NULL, NULL);

DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL);

DEFINE_CLOCK(pwm4_clk,	 0, CCM_CGCR2,  2, get_rate_ipg, NULL, NULL);

DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL);

DEFINE_CLOCK(kpp_clk,	 0, CCM_CGCR1, 28, get_rate_ipg, NULL, NULL);

DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR0, 23, get_rate_ipg, NULL);

DEFINE_CLOCK(tsc_clk,	 0, CCM_CGCR2, 13, get_rate_ipg, NULL, NULL);

DEFINE_CLOCK(i2c_clk,	 0, CCM_CGCR0,  6, get_rate_i2c, NULL, NULL);

DEFINE_CLOCK(fec_clk,	 0, CCM_CGCR1, 15, get_rate_ipg, NULL, &fec_ahb_clk);





#define _REGISTER_CLOCK(d, n, c)	\

#define _REGISTER_CLOCK(d, n, c)	\

	{				\

	{				\
@@ -208,13 +216,21 @@ static struct clk_lookup lookups[] = { 
	_REGISTER_CLOCK("fec.0", NULL, fec_clk)

	_REGISTER_CLOCK("fec.0", NULL, fec_clk)

};

};





int __init mx25_clocks_init(unsigned long fref)

int __init mx25_clocks_init(void)

{

{

	int i;

	int i;





	for (i = 0; i < ARRAY_SIZE(lookups); i++)

	for (i = 0; i < ARRAY_SIZE(lookups); i++)

		clkdev_add(&lookups[i]);

		clkdev_add(&lookups[i]);





	/* Turn off all clocks except the ones we need to survive, namely:

	 * EMI, GPIO1-3 (CCM_CGCR1[18:16]), GPT1, IOMUXC (CCM_CGCR1[27]), IIM,

	 * SCC

	 */

	__raw_writel((1 << 19), CRM_BASE + CCM_CGCR0);

	__raw_writel((0xf << 16) | (3 << 26), CRM_BASE + CCM_CGCR1);

	__raw_writel((1 << 5), CRM_BASE + CCM_CGCR2);



	mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);

	mxc_timer_init(&gpt_clk, MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), 54);





	return 0;

	return 0;

arch/arm/mach-mx25/mx25pdk.c

+1 −1
Original line number Original line Diff line number Diff line
@@ -91,7 +91,7 @@ static void __init mx25pdk_init(void) 




static void __init mx25pdk_timer_init(void)

static void __init mx25pdk_timer_init(void)

{

{

	mx25_clocks_init(26000000);

	mx25_clocks_init();

}

}





static struct sys_timer mx25pdk_timer = {

static struct sys_timer mx25pdk_timer = {

arch/arm/mach-mx3/mx31ads.c

+4 −0
Original line number Original line Diff line number Diff line
@@ -173,6 +173,7 @@ static void expio_unmask_irq(u32 irq) 
}

}





static struct irq_chip expio_irq_chip = {

static struct irq_chip expio_irq_chip = {

	.name = "EXPIO(CPLD)",

	.ack = expio_ack_irq,

	.ack = expio_ack_irq,

	.mask = expio_mask_irq,

	.mask = expio_mask_irq,

	.unmask = expio_unmask_irq,

	.unmask = expio_unmask_irq,
@@ -302,6 +303,7 @@ static struct regulator_init_data ldo1_data = { 
		.min_uV = 2800000,

		.min_uV = 2800000,

		.max_uV = 2800000,

		.max_uV = 2800000,

		.valid_modes_mask = REGULATOR_MODE_NORMAL,

		.valid_modes_mask = REGULATOR_MODE_NORMAL,

		.valid_ops_mask = REGULATOR_CHANGE_STATUS,

		.apply_uV = 1,

		.apply_uV = 1,

	},

	},

};

};
@@ -322,6 +324,7 @@ static struct regulator_init_data ldo2_data = { 
		.min_uV = 3300000,

		.min_uV = 3300000,

		.max_uV = 3300000,

		.max_uV = 3300000,

		.valid_modes_mask = REGULATOR_MODE_NORMAL,

		.valid_modes_mask = REGULATOR_MODE_NORMAL,

		.valid_ops_mask = REGULATOR_CHANGE_STATUS,

		.apply_uV = 1,

		.apply_uV = 1,

	},

	},

	.num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),

	.num_consumer_supplies = ARRAY_SIZE(ldo2_consumers),
@@ -459,6 +462,7 @@ static int mx31_wm8350_init(struct wm8350 *wm8350) 




static struct wm8350_platform_data __initdata mx31_wm8350_pdata = {

static struct wm8350_platform_data __initdata mx31_wm8350_pdata = {

	.init = mx31_wm8350_init,

	.init = mx31_wm8350_init,

	.irq_base = MXC_BOARD_IRQ_START + MXC_MAX_EXP_IO_LINES,

};

};

#endif

#endif

arch/arm/mach-realview/realview_pbx.c

+2 −2
Original line number Original line Diff line number Diff line
@@ -334,8 +334,8 @@ static void realview_pbx_reset(char mode) 
	 * in the system FPGA

	 * in the system FPGA

	 */

	 */

	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);

	__raw_writel(REALVIEW_SYS_LOCK_VAL, lock_ctrl);

	__raw_writel(0x0000, reset_ctrl);

	__raw_writel(0x00F0, reset_ctrl);

	__raw_writel(0x0004, reset_ctrl);

	__raw_writel(0x00F4, reset_ctrl);

}

}





static void __init realview_pbx_init(void)

static void __init realview_pbx_init(void)