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Commit fc0eed74 authored by Vijay Viswanath's avatar Vijay Viswanath
Browse files

ARM: dts: msm: Change QOS latency value for 8917 



l2_GDHS state is disabled. So to allow L2-retention,
the QOS value needs to be changed to 651.

Change-Id: I2d2f4f842bbfe8db204d3aef15d97eb99ba0eaf7
Signed-off-by: default avatarVijay Viswanath <vviswana@codeaurora.org>
parent 9cfd0ac6

arch/arm/boot/dts/qcom/msm8917.dtsi

+5 −5
Original line number Diff line number Diff line
@@ -1394,12 +1394,12 @@ 
		qcom,devfreq,freq-table = <50000000 200000000>;



		qcom,pm-qos-irq-type = "affine_irq";

		qcom,pm-qos-irq-latency = <13 281>;

		qcom,pm-qos-irq-latency = <13 651>;



		qcom,pm-qos-cpu-groups = <0x0f>;

		qcom,pm-qos-cmdq-latency-us = <13 281>;

		qcom,pm-qos-cmdq-latency-us = <13 651>;



		qcom,pm-qos-legacy-latency-us = <13 281>;

		qcom,pm-qos-legacy-latency-us = <13 651>;



		qcom,msm-bus,name = "sdhc1";

		qcom,msm-bus,num-cases = <9>;
@@ -1438,10 +1438,10 @@ 
		qcom,large-address-bus;



		qcom,pm-qos-irq-type = "affine_irq";

		qcom,pm-qos-irq-latency = <13 281>;

		qcom,pm-qos-irq-latency = <13 651>;



		qcom,pm-qos-cpu-groups = <0x0f>;

		qcom,pm-qos-legacy-latency-us = <13 281>;

		qcom,pm-qos-legacy-latency-us = <13 651>;



		qcom,msm-bus,name = "sdhc2";

		qcom,msm-bus,num-cases = <8>;