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Commit fbe4da09 authored by Yan He's avatar Yan He
Browse files

ARM: dts: msm: add PCIe endpoint on mdmcalifornium 



Add PCIe endpoint node to device tree of mdmcalifornium. PCIe controller
is in endpoint mode and communicates with the PCIe root complex on host
side.

Change-Id: I76df4b4a67beea7d7fba12998ec705e984eef658
Signed-off-by: default avatarYan He <yanhe@codeaurora.org>
parent fa90eb2c

arch/arm/boot/dts/qcom/mdmcalifornium.dtsi

+61 −0
Original line number Diff line number Diff line
@@ -388,6 +388,67 @@ 
		qcom,pipe-attr-ee;

	};



	pcie_ep: qcom,pcie@7fffd000 {

		compatible = "qcom,pcie-ep";



		reg = <0x7fffd000 0x1000>,

			<0x7fffe000 0xf1d>,

			<0x7fffef20 0xa8>,

			<0x00080000 0x2000>,

			<0x00086000 0x1000>,

			<0x00087000 0x1000>;

		reg-names = "msi", "dm_core", "elbi", "parf", "phy", "mmio";



		#address-cells = <0>;

		interrupt-parent = <&pcie_ep>;

		interrupts = <0>;

		#interrupt-cells = <1>;

		interrupt-map-mask = <0xffffffff>;

		interrupt-map = <0 &intc 0 49 0>;

		interrupt-names = "int_global";



		pinctrl-names = "default";

		pinctrl-0 = <&pcie0_clkreq_default &pcie0_perst_default

				&pcie0_wake_default>;



		perst-gpio = <&tlmm_pinmux 65 0>;

		wake-gpio = <&tlmm_pinmux 61 0>;

		clkreq-gpio = <&tlmm_pinmux 64 0>;



		gdsc-vdd-supply = <&gdsc_pcie>;

		vreg-1.8-supply = <&pmdcalifornium_l5>;

		vreg-0.9-supply = <&pmdcalifornium_l4>;



		qcom,vreg-0.9-voltage-level = <928000 928000 24000>;



		clocks = <&clock_gcc clk_gcc_pcie_pipe_clk>,

			<&clock_gcc clk_gcc_pcie_cfg_ahb_clk>,

			<&clock_gcc clk_gcc_pcie_axi_mstr_clk>,

			<&clock_gcc clk_gcc_pcie_axi_clk>,

			<&clock_gcc clk_gcc_pcie_sleep_clk>,

			<&clock_gcc clk_gcc_pcie_ref_clk>,

			<&clock_gcc clk_gcc_pcie_phy_reset>;



		clock-names = "pcie_0_pipe_clk", "pcie_0_cfg_ahb_clk",

				"pcie_0_mstr_axi_clk", "pcie_0_slv_axi_clk",

				"pcie_0_aux_clk", "pcie_0_ldo",

				"pcie_0_phy_reset";

		max-clock-frequency-hz = <0>, <0>, <0>, <0>, <19200000>,

					<0>, <0>;



		qcom,msm-bus,name = "pcie-ep";

		qcom,msm-bus,num-cases = <2>;

		qcom,msm-bus,num-paths = <1>;

		qcom,msm-bus,vectors-KBps =

				<45 512 0 0>,

				<45 512 500 800>;



		qcom,pcie-link-speed = <2>;

		qcom,pcie-phy-ver = <4>;

		qcom,pcie-active-config;

		qcom,pcie-aggregated-irq;

	};



	qcom,msm_gsi {

		compatible = "qcom,msm_gsi";

	};