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Commit fa95fffd authored by vjitta's avatar vjitta Committed by Vijayanand Jitta
Browse files

ARM: dts: msm: update coresight nodes for MSM 8953/8940/8920 



Add the port information, CTI and ETM device nodes of scalar
modem and update the register address for vector modem for
msm8953, msm8940 and msm8920 targets.

Change-Id: I66fc84c64145a456afe1fe62d5891914a478aba9
Signed-off-by: default avatarVijayanand Jitta <vjitta@codeaurora.org>
parent db538334

arch/arm/boot/dts/qcom/msm8920.dtsi

+54 −0
Original line number Diff line number Diff line
@@ -193,3 +193,57 @@ 
	/delete-property/ qcom,cpr-init-voltage-adjustment;

	/delete-property/ qcom,cpr-enable;

};



&funnel_apss {

	coresight-child-ports = <3>;

};



&soc {

	/delete-node/ cti@6124000;

	cti_modem_cpu0: cti@6128000 {

		compatible = "arm,coresight-cti";

		reg = <0x6128000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <51>;

		coresight-name = "coresight-cti-modem-cpu0";

		coresight-nr-inports = <0>;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";

	};



	/* MSS_SCL */

	modem_etm0 {

		coresight-child-ports = <2>;

	};



	cti_modem_cpu1: cti@6124000 {

		compatible = "arm,coresight-cti";

		reg = <0x6124000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <52>;

		coresight-name = "coresight-cti-modem-cpu1";

		coresight-nr-inports = <0>;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";

	};



	/* MSS_VEC */

	modem_etm1 {

		compatible = "qcom,coresight-remote-etm";



		coresight-id = <53>;

		coresight-name = "coresight-modem-etm1";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;

		coresight-child-list = <&funnel_right>;

		coresight-child-ports = <1>;



		qcom,inst-id = <11>;

	};

};

arch/arm/boot/dts/qcom/msm8940.dtsi

+17 −2
Original line number Diff line number Diff line
@@ -283,12 +283,27 @@ 
};



&soc {

	cti_modem_cpu1: cti@6128000{

	/delete-node/ cti@6124000;

	cti_modem_cpu0: cti@6128000{

		compatible = "arm,coresight-cti";

		reg = <0x6128000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <59>;

		coresight-name = "coresight-cti-modem-cpu0";

		coresight-nr-inports = <0>;



		clocks = <&clock_gcc clk_qdss_clk>,

			 <&clock_gcc clk_qdss_a_clk>;

		clock-names = "core_clk", "core_a_clk";

	};



	cti_modem_cpu1: cti@6124000{

		compatible = "arm,coresight-cti";

		reg = <0x6124000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <60>;

		coresight-name = "coresight-cti-modem-cpu1";

		coresight-nr-inports = <0>;
@@ -301,7 +316,7 @@ 
	modem_etm1 {

		compatible = "qcom,coresight-remote-etm";



		coresight-id = <60>;

		coresight-id = <61>;

		coresight-name = "coresight-modem-etm1";

		coresight-nr-inports = <0>;

		coresight-outports = <0>;

arch/arm/boot/dts/qcom/msm8953-coresight.dtsi

+4 −4
Original line number Diff line number Diff line
@@ -751,9 +751,9 @@ 
		clock-names = "core_clk", "core_a_clk";

	};



	cti_modem_cpu0: cti@6124000 {

	cti_modem_cpu0: cti@6128000 {

		compatible = "arm,coresight-cti";

		reg = <0x6124000 0x1000>;

		reg = <0x6128000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <44>;
@@ -765,9 +765,9 @@ 
		clock-names = "core_clk", "core_a_clk";

	};



	cti_modem_cpu1: cti@6128000{

	cti_modem_cpu1: cti@6124000{

		compatible = "arm,coresight-cti";

		reg = <0x6128000 0x1000>;

		reg = <0x6124000 0x1000>;

		reg-names = "cti-base";



		coresight-id = <45>;