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Commit f9cfd49b authored by Linux Build Service Account's avatar Linux Build Service Account Committed by Gerrit - the friendly Code Review server
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Merge "clk: msm: mdss: enable pll resources once in prepare"

parents 802a0c21 6781a5a0
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+0 −39
Original line number Diff line number Diff line
@@ -22,8 +22,6 @@
		reg-names = "pll_base", "gdsc_base";

		gdsc-supply = <&gdsc_mdss>;
		vdda-supply = <&pm8994_l2>;
		vcca-supply = <&pm8994_l28>;

		clocks = <&clock_mmss clk_mdss_ahb_clk>;
		clock-names = "iface_clk";
@@ -42,23 +40,6 @@
				qcom,supply-disable-load = <0>;
			};

			qcom,platform-supply-entry@1 {
				reg = <1>;
				qcom,supply-name = "vdda";
				qcom,supply-min-voltage = <1250000>;
				qcom,supply-max-voltage = <1250000>;
				qcom,supply-enable-load = <18160>;
				qcom,supply-disable-load = <1>;
			};

			qcom,platform-supply-entry@2 {
				reg = <2>;
				qcom,supply-name = "vcca";
				qcom,supply-min-voltage = <925000>;
				qcom,supply-max-voltage = <925000>;
				qcom,supply-enable-load = <17000>;
				qcom,supply-disable-load = <33>;
			};
		};
	};

@@ -73,8 +54,6 @@
		reg-names = "pll_base", "gdsc_base";

		gdsc-supply = <&gdsc_mdss>;
		vdda-supply = <&pm8994_l2>;
		vcca-supply = <&pm8994_l28>;

		clocks = <&clock_mmss clk_mdss_ahb_clk>;
		clock-names = "iface_clk";
@@ -92,24 +71,6 @@
				qcom,supply-enable-load = <0>;
				qcom,supply-disable-load = <0>;
			};

			qcom,platform-supply-entry@1 {
				reg = <1>;
				qcom,supply-name = "vdda";
				qcom,supply-min-voltage = <1250000>;
				qcom,supply-max-voltage = <1250000>;
				qcom,supply-enable-load = <18160>;
				qcom,supply-disable-load = <1>;
			};

			qcom,platform-supply-entry@2 {
				reg = <2>;
				qcom,supply-name = "vcca";
				qcom,supply-min-voltage = <925000>;
				qcom,supply-max-voltage = <925000>;
				qcom,supply-enable-load = <17000>;
				qcom,supply-disable-load = <33>;
			};
		};
	};

+15 −11
Original line number Diff line number Diff line
@@ -254,13 +254,6 @@ static int dsi_pll_enable(struct clk *c)
	struct dsi_pll_vco_clk *vco = to_vco_clk(c);
	struct mdss_pll_resources *pll = vco->priv;

	rc = mdss_pll_resource_enable(pll, true);
	if (rc) {
		pr_err("ndx=%d Failed to enable mdss dsi pll resources\n",
							pll->index);
		return rc;
	}

	/* Try all enable sequences until one succeeds */
	for (i = 0; i < vco->pll_en_seq_cnt; i++) {
		rc = vco->pll_enable_seqs[i](pll);
@@ -270,12 +263,10 @@ static int dsi_pll_enable(struct clk *c)
			break;
	}

	if (rc) {
		mdss_pll_resource_enable(pll, false);
	if (rc)
		pr_err("ndx=%d DSI PLL failed to lock\n", pll->index);
	} else {
	else
		pll->pll_on = true;
	}

	return rc;
}
@@ -902,18 +893,31 @@ int pll_vco_prepare_8996(struct clk *c)
		return -EINVAL;
	}

	rc = mdss_pll_resource_enable(pll, true);
	if (rc) {
		pr_err("ndx=%d Failed to enable mdss dsi pll resources\n",
							pll->index);
		return rc;
	}

	if ((pll->vco_cached_rate != 0)
	    && (pll->vco_cached_rate == c->rate)) {
		rc = c->ops->set_rate(c, pll->vco_cached_rate);
		if (rc) {
			pr_err("index=%d vco_set_rate failed. rc=%d\n",
					rc, pll->index);
			mdss_pll_resource_enable(pll, false);
			goto error;
		}
	}

	rc = dsi_pll_enable(c);

	if (rc) {
		mdss_pll_resource_enable(pll, false);
		pr_err("ndx=%d failed to enable dsi pll\n", pll->index);
	}

error:
	return rc;
}