Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f9b4df4a authored by Bastian Hecht's avatar Bastian Hecht Committed by Simon Horman
Browse files

ARM: shmobile: r8a7740: Add OF support to initialze the GIC 



We add a variant to initalize the interrupt controller in case we describe
the GIC using the Device Tree and not platform data.

Signed-off-by: default avatarBastian Hecht <hechtb+renesas@gmail.com>
Signed-off-by: default avatarSimon Horman <horms+renesas@verge.net.au>
parent c7788792

arch/arm/mach-shmobile/include/mach/r8a7740.h

+1 −0
Original line number Diff line number Diff line
@@ -534,6 +534,7 @@ enum { 


extern void r8a7740_meram_workaround(void);

extern void r8a7740_init_irq(void);

extern void r8a7740_init_irq_of(void);

extern void r8a7740_map_io(void);

extern void r8a7740_add_early_devices(void);

extern void r8a7740_add_standard_devices(void);

arch/arm/mach-shmobile/intc-r8a7740.c

+18 −6
Original line number Diff line number Diff line
@@ -20,19 +20,15 @@ 


#include <linux/init.h>

#include <linux/io.h>

#include <linux/irqchip.h>

#include <linux/irqchip/arm-gic.h>



void __init r8a7740_init_irq(void)

static void __init r8a7740_init_irq_common(void)

{

	void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);

	void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);

	void __iomem *intc_prio_base = ioremap_nocache(0xe6900010, 0x10);

	void __iomem *intc_msk_base = ioremap_nocache(0xe6900040, 0x10);

	void __iomem *pfc_inta_ctrl = ioremap_nocache(0xe605807c, 0x4);



	/* initialize the Generic Interrupt Controller PL390 r0p0 */

	gic_init(0, 29, gic_dist_base, gic_cpu_base);



	/* route signals to GIC */

	iowrite32(0x0, pfc_inta_ctrl);
@@ -54,3 +50,19 @@ void __init r8a7740_init_irq(void) 
	iounmap(intc_msk_base);

	iounmap(pfc_inta_ctrl);

}



void __init r8a7740_init_irq_of(void)

{

	irqchip_init();

	r8a7740_init_irq_common();

}



void __init r8a7740_init_irq(void)

{

	void __iomem *gic_dist_base = ioremap_nocache(0xc2800000, 0x1000);

	void __iomem *gic_cpu_base = ioremap_nocache(0xc2000000, 0x1000);



	/* initialize the Generic Interrupt Controller PL390 r0p0 */

	gic_init(0, 29, gic_dist_base, gic_cpu_base);

	r8a7740_init_irq_common();

}