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Commit f99e8c1d authored by Mike Frysinger's avatar Mike Frysinger
Browse files

Blackfin: work around testset anomaly 05000477 



Ironically, the atomic testset instruction cannot be interrupted else it
will produce incorrect results.  So disable interrupts to help it out.

Signed-off-by: default avatarMike Frysinger <vapier@gentoo.org>
parent af5d7fc7

arch/blackfin/mach-bf561/atomic.S

+12 −2
Original line number Diff line number Diff line
@@ -19,6 +19,16 @@ 
	\reg\().h = _corelock;

.endm



.macro safe_testset addr:req, scratch:req

#if ANOMALY_05000477

	cli \scratch;

	testset (\addr);

	sti \scratch;

#else

	testset (\addr);

#endif

.endm



/*

 * r0 = address of atomic data to flush and invalidate (32bit).

 *
@@ -33,7 +43,7 @@ ENTRY(_get_core_lock) 
	cli r0;

	coreslot_loadaddr p0;

.Lretry_corelock:

	testset (p0);

	safe_testset p0, r2;

	if cc jump .Ldone_corelock;

	SSYNC(r2);

	jump .Lretry_corelock
@@ -56,7 +66,7 @@ ENTRY(_get_core_lock_noflush) 
	cli r0;

	coreslot_loadaddr p0;

.Lretry_corelock_noflush:

	testset (p0);

	safe_testset p0, r2;

	if cc jump .Ldone_corelock_noflush;

	SSYNC(r2);

	jump .Lretry_corelock_noflush