Donate to e Foundation | Murena handsets with /e/OS | Own a part of Murena! Learn more

Commit f825f64e authored by Gilad Avidov's avatar Gilad Avidov Committed by Matt Wagantall
Browse files

qcom-sps-dma: DMA-engine driver for BAM using sps API 



qcom-sps-dma driver provides DMA-engine interface for the
sps-BAM driver. This driver enables external bus drivers
to replace the underlying DMA HW seamlessly.

The client drivers are responsible for setting clocks on,
before calling DMA services. On a client call,
qcom-sps-dma checks if the BAM device is initialized,
and if it is not, it initializes it before handling
transfers.

Clients configure their DMA channels by adding dmas and
dma-names in their device tree nodes, and use a phandle
to point to the required qcom-sps-dma instance. Before
using that channels, clients are required to configure them
with the DMA transfer direction.

Change-Id: I15279cc57fed7c93b4a36e29de73dd617da76186
Signed-off-by: default avatarGilad Avidov <gavidov@codeaurora.org>
Signed-off-by: default avatarAnkit Gupta <ankgupta@codeaurora.org>
parent d7beb599

Documentation/devicetree/bindings/dma/qcom-sps-dma.txt

0 → 100644
+42 −0
Original line number Diff line number Diff line 
* Qualcomm technologies inc, DMA engine driver for BAM (Bus Access Manager).



Required properties:

- compatible: Should be "qcom,sps-dma".

- reg: Should contain DMA registers location and length. This should include

  all of the per-channel registers.

- interrupts: Should contain the BAM interrupt number.

- qcom,summing-threshold:  Should contain the BAM event threshold of

  the sum of descriptors' sizes in bytes.



Optional properties:

- qcom,managed-locally : Use when BAM global device control is managed locally

  by the application processor.



Example:



	dma_blsp1: qcom,sps-dma@f9904000 { /* BLSP1 */

		#dma-cells = <4>;

		compatible = "qcom,sps-dma";

		reg = <0xf9904000 0x19000>;

		interrupts = <0 238 0>;

		qcom,summing-threshold = <10>;

	};



DMA clients connected to the qcom-sps-dma DMA controller must use the format

described in the dma.txt file, using a five-cell specifier for each channel,

a phandle plus four integer cells, as shown below:



dmas = <[phandle of the dma controller] [pipe index] [number of descriptors]

				[sps_connect flags] [sps_register_event flags]>;



Example:



i2c_2: i2c@f9924000 { /* BLSP1 QUP2 */

	.

	.

	.

	/*     <&phandle pipe-idx n-descs connect-flags event-flags> */

	dmas = <&dma_blsp1 14 32 0x20000020 0x20>,

	       <&dma_blsp1 15 64 0x20000020 0x20>;

	dma-names = "tx", "rx";

};

drivers/dma/Kconfig

+30 −0
Original line number Diff line number Diff line
@@ -100,6 +100,36 @@ config INTEL_IOP_ADMA 


source "drivers/dma/dw/Kconfig"



config QCOM_SPS_DMA

	tristate "Qualcomm technologies inc DMA driver for sps-BAM"

	depends on ARCH_MSM

	select DMA_ENGINE

	help

	  Enable support for Qualcomm technologies inc, BAM DMA engine.

	  This DMA-engine-driver is a wrapper of the sps-BAM library. DMA

	  engine callbacks are implemented using the sps-BAM functionality

	  to access HW.



config DW_DMAC

	tristate "Synopsys DesignWare AHB DMA support"

	depends on GENERIC_HARDIRQS

	select DMA_ENGINE

	default y if CPU_AT32AP7000

	help

	  Support the Synopsys DesignWare AHB DMA controller.  This

	  can be integrated in chips such as the Atmel AT32ap7000.



config DW_DMAC_BIG_ENDIAN_IO

	bool "Use big endian I/O register access"

	default y if AVR32

	depends on DW_DMAC

	help

	  Say yes here to use big endian I/O access when reading and writing

	  to the DMA controller registers. This is needed on some platforms,

	  like the Atmel AVR32 architecture.



	  If unsure, use the default setting.



config AT_HDMAC

	tristate "Atmel AHB DMA support"

	depends on ARCH_AT91

drivers/dma/Makefile

+1 −0
Original line number Diff line number Diff line
@@ -10,6 +10,7 @@ obj-$(CONFIG_INTEL_MID_DMAC) += intel_mid_dma.o 
obj-$(CONFIG_DMATEST) += dmatest.o

obj-$(CONFIG_INTEL_IOATDMA) += ioat/

obj-$(CONFIG_INTEL_IOP_ADMA) += iop-adma.o

obj-$(CONFIG_QCOM_SPS_DMA) += qcom-sps-dma.o

obj-$(CONFIG_FSL_DMA) += fsldma.o

obj-$(CONFIG_MPC512X_DMA) += mpc512x_dma.o

obj-$(CONFIG_PPC_BESTCOMM) += bestcomm/

drivers/dma/qcom-sps-dma.c

0 → 100644
+759 −0

File added.

Preview size limit exceeded, changes collapsed.