Loading arch/arm/boot/dts/qcom/msm8953.dtsi +4 −2 Original line number Original line Diff line number Diff line Loading @@ -1772,8 +1772,10 @@ sdhc_1: sdhci@7824900 { sdhc_1: sdhci@7824900 { compatible = "qcom,sdhci-msm"; compatible = "qcom,sdhci-msm"; reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>; reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>, reg-names = "hc_mem", "core_mem", "cmdq_mem"; <0x0119d000 0x4>; reg-names = "hc_mem", "core_mem", "cmdq_mem", "tlmm_mem"; interrupts = <0 123 0>, <0 138 0>; interrupts = <0 123 0>, <0 138 0>; interrupt-names = "hc_irq", "pwr_irq"; interrupt-names = "hc_irq", "pwr_irq"; Loading Loading
arch/arm/boot/dts/qcom/msm8953.dtsi +4 −2 Original line number Original line Diff line number Diff line Loading @@ -1772,8 +1772,10 @@ sdhc_1: sdhci@7824900 { sdhc_1: sdhci@7824900 { compatible = "qcom,sdhci-msm"; compatible = "qcom,sdhci-msm"; reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>; reg = <0x7824900 0x500>, <0x7824000 0x800>, <0x7824e00 0x200>, reg-names = "hc_mem", "core_mem", "cmdq_mem"; <0x0119d000 0x4>; reg-names = "hc_mem", "core_mem", "cmdq_mem", "tlmm_mem"; interrupts = <0 123 0>, <0 138 0>; interrupts = <0 123 0>, <0 138 0>; interrupt-names = "hc_irq", "pwr_irq"; interrupt-names = "hc_irq", "pwr_irq"; Loading