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Commit f6b6eb69 authored by Yuval Mintz's avatar Yuval Mintz Committed by David S. Miller
Browse files

bnx2x: correct & clean 10G EEE requirements 



Signed-off-by: default avatarYuval Mintz <yuvalmin@broadcom.com>
Signed-off-by: default avatarEilon Greenstein <eilong@broadcom.com>
Signed-off-by: default avatarDavid S. Miller <davem@davemloft.net>
parent ec4010ec

drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.c

+4 −5
Original line number Diff line number Diff line
@@ -10203,8 +10203,9 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy, 
			MDIO_84833_TOP_CFG_FW_REV, &val);



	/* Configure EEE support */

	if ((val >= MDIO_84833_TOP_CFG_FW_EEE) && bnx2x_eee_has_cap(params)) {

		phy->flags |= FLAGS_EEE_10GBT;

	if ((val >= MDIO_84833_TOP_CFG_FW_EEE) &&

	    (val != MDIO_84833_TOP_CFG_FW_NO_EEE) &&

	    bnx2x_eee_has_cap(params)) {

		rc = bnx2x_eee_initial_config(params, vars, SHMEM_EEE_10G_ADV);

		if (rc) {

			DP(NETIF_MSG_LINK, "Failed to configure EEE timers\n");
@@ -10224,7 +10225,6 @@ static int bnx2x_848x3_config_init(struct bnx2x_phy *phy, 
			return rc;

		}

	} else {

		phy->flags &= ~FLAGS_EEE_10GBT;

		vars->eee_status &= ~SHMEM_EEE_SUPPORTED_MASK;

	}
@@ -11619,8 +11619,7 @@ static struct bnx2x_phy phy_84833 = { 
	.def_md_devad	= 0,

	.flags		= (FLAGS_FAN_FAILURE_DET_REQ |

			   FLAGS_REARM_LATCH_SIGNAL |

			   FLAGS_TX_ERROR_CHECK |

			   FLAGS_EEE_10GBT),

			   FLAGS_TX_ERROR_CHECK),

	.rx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},

	.tx_preemphasis	= {0xffff, 0xffff, 0xffff, 0xffff},

	.mdio_ctrl	= 0,

drivers/net/ethernet/broadcom/bnx2x/bnx2x_link.h

+0 −1
Original line number Diff line number Diff line
@@ -155,7 +155,6 @@ struct bnx2x_phy { 
#define FLAGS_DUMMY_READ		(1<<9)

#define FLAGS_MDC_MDIO_WA_B0		(1<<10)

#define FLAGS_TX_ERROR_CHECK		(1<<12)

#define FLAGS_EEE_10GBT			(1<<13)



	/* preemphasis values for the rx side */

	u16 rx_preemphasis[4];

drivers/net/ethernet/broadcom/bnx2x/bnx2x_reg.h

+1 −0
Original line number Diff line number Diff line
@@ -6992,6 +6992,7 @@ Theotherbitsarereservedandshouldbezero*/ 
/* BCM84833 only */

#define MDIO_84833_TOP_CFG_FW_REV			0x400f

#define MDIO_84833_TOP_CFG_FW_EEE		0x10b1

#define MDIO_84833_TOP_CFG_FW_NO_EEE		0x1f81

#define MDIO_84833_TOP_CFG_XGPHY_STRAP1			0x401a

#define MDIO_84833_SUPER_ISOLATE		0x8000

/* These are mailbox register set used by 84833. */